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Searched refs:PERIPH_BASE (Results 1 – 25 of 48) sorted by relevance

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/btstack/port/msp432p401lp-cc256x/ti/devices/msp432p4xx/inc/
H A Dmsp432p401m.h271 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
274 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
275 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
276 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
277 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
278 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
279 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
280 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
281 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
282 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p401r.h271 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
274 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
275 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
276 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
277 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
278 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
279 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
280 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
281 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
282 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p411y.h262 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
265 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
266 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
267 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
268 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
269 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
270 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
271 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
272 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
273 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p411v.h262 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
265 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
266 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
267 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
268 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
269 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
270 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
271 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
272 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
273 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p4111.h262 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
265 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
266 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
267 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
268 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
269 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
270 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
271 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
272 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
273 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p401y.h257 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
260 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
261 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
262 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
263 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
264 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
265 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
266 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
267 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
268 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p4011.h257 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
260 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
261 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
262 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
263 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
264 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
265 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
266 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
267 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
268 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p401v.h257 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
260 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
261 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
262 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
263 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
264 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
265 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
266 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
267 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
268 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
H A Dmsp432p4xx.h264 #define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripherals s… macro
266 #define ADC14_BASE (PERIPH_BASE +0x00012000) /*!< Base address …
267 #define AES256_BASE (PERIPH_BASE +0x00003C00) /*!< Base address …
268 #define CAPTIO0_BASE (PERIPH_BASE +0x00005400) /*!< Base address …
269 #define CAPTIO1_BASE (PERIPH_BASE +0x00005800) /*!< Base address …
270 #define COMP_E0_BASE (PERIPH_BASE +0x00003400) /*!< Base address …
271 #define COMP_E1_BASE (PERIPH_BASE +0x00003800) /*!< Base address …
272 #define CRC32_BASE (PERIPH_BASE +0x00004000) /*!< Base address …
273 #define CS_BASE (PERIPH_BASE +0x00010400) /*!< Base address …
274 #define DIO_BASE (PERIPH_BASE +0x00004C00) /*!< Base address …
[all …]
/btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/
H A Dstm32f4xx_hal_pwr.h346 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
H A Dstm32f4xx_hal_rcc.h1295 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE)
1333 #define RCC_BDCR_BYTE0_ADDRESS (PERIPH_BASE + RCC_BDCR_OFFSET)
H A Dstm32f4xx_ll_sdmmc.h645 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
/btstack/port/stm32-f4discovery-cc256x/Drivers/STM32F4xx_HAL_Driver/Inc/
H A Dstm32f4xx_hal_pwr.h346 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
H A Dstm32f4xx_hal_rcc.h1295 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE)
1333 #define RCC_BDCR_BYTE0_ADDRESS (PERIPH_BASE + RCC_BDCR_OFFSET)
/btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Src/
H A Dstm32f4xx_hal.c67 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
/btstack/port/stm32-f4discovery-cc256x/Drivers/STM32F4xx_HAL_Driver/Src/
H A Dstm32f4xx_hal.c67 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
/btstack/port/stm32-l451-miromico-sx1280/Drivers/STM32L4xx_HAL_Driver/Src/
H A Dstm32l4xx_hal.c68 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/STM32L4xx_HAL_Driver/Src/
H A Dstm32l4xx_hal.c68 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/STM32L0xx_HAL_Driver/Inc/
H A Dstm32l0xx_hal_rcc.h69 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE)
/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
H A Dstm32wb50xx.h763 #define PERIPH_BASE (0x40000000UL)/*!< Peripheral base address */ macro
794 #define APB1PERIPH_BASE PERIPH_BASE
795 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL)
796 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL)
797 #define AHB2PERIPH_BASE (PERIPH_BASE + 0x08000000UL)
798 #define AHB4PERIPH_BASE (PERIPH_BASE + 0x18000000UL)
799 #define APB3PERIPH_BASE (PERIPH_BASE + 0x20000000UL)
800 #define AHB3PERIPH_BASE (PERIPH_BASE + 0x50000000UL)
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h564 #define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region … macro
576 #define APB1PERIPH_BASE PERIPH_BASE
577 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL)
578 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL)
638 #define RNG_BASE (PERIPH_BASE + 0x80000UL)
H A Dstm32f410tx.h561 #define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region … macro
573 #define APB1PERIPH_BASE PERIPH_BASE
574 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL)
575 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL)
631 #define RNG_BASE (PERIPH_BASE + 0x80000UL)
H A Dstm32f410cx.h564 #define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region … macro
576 #define APB1PERIPH_BASE PERIPH_BASE
577 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL)
578 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL)
638 #define RNG_BASE (PERIPH_BASE + 0x80000UL)
H A Dstm32f401xe.h638 #define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region … macro
651 #define APB1PERIPH_BASE PERIPH_BASE
652 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL)
653 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL)
654 #define AHB2PERIPH_BASE (PERIPH_BASE + 0x10000000UL)
H A Dstm32f401xc.h638 #define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region … macro
651 #define APB1PERIPH_BASE PERIPH_BASE
652 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL)
653 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL)
654 #define AHB2PERIPH_BASE (PERIPH_BASE + 0x10000000UL)

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