1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F4xx_HAL_PWR_H 22 #define __STM32F4xx_HAL_PWR_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f4xx_hal_def.h" 30 31 /** @addtogroup STM32F4xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup PWR 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** @defgroup PWR_Exported_Types PWR Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief PWR PVD configuration structure definition 47 */ 48 typedef struct 49 { 50 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 51 This parameter can be a value of @ref PWR_PVD_detection_level */ 52 53 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode */ 55 }PWR_PVDTypeDef; 56 57 /** 58 * @} 59 */ 60 61 /* Exported constants --------------------------------------------------------*/ 62 /** @defgroup PWR_Exported_Constants PWR Exported Constants 63 * @{ 64 */ 65 66 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins 67 * @{ 68 */ 69 #define PWR_WAKEUP_PIN1 0x00000100U 70 /** 71 * @} 72 */ 73 74 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 75 * @{ 76 */ 77 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 78 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 79 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 80 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 81 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 82 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 83 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 84 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage 85 (Compare internally to VREFINT) */ 86 /** 87 * @} 88 */ 89 90 /** @defgroup PWR_PVD_Mode PWR PVD Mode 91 * @{ 92 */ 93 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ 94 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ 95 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ 96 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 97 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ 98 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ 99 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ 100 /** 101 * @} 102 */ 103 104 105 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 106 * @{ 107 */ 108 #define PWR_MAINREGULATOR_ON 0x00000000U 109 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 110 /** 111 * @} 112 */ 113 114 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 115 * @{ 116 */ 117 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 118 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 119 /** 120 * @} 121 */ 122 123 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 124 * @{ 125 */ 126 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 127 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 128 /** 129 * @} 130 */ 131 132 /** @defgroup PWR_Flag PWR Flag 133 * @{ 134 */ 135 #define PWR_FLAG_WU PWR_CSR_WUF 136 #define PWR_FLAG_SB PWR_CSR_SBF 137 #define PWR_FLAG_PVDO PWR_CSR_PVDO 138 #define PWR_FLAG_BRR PWR_CSR_BRR 139 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 140 /** 141 * @} 142 */ 143 144 /** 145 * @} 146 */ 147 148 /* Exported macro ------------------------------------------------------------*/ 149 /** @defgroup PWR_Exported_Macro PWR Exported Macro 150 * @{ 151 */ 152 153 /** @brief Check PWR flag is set or not. 154 * @param __FLAG__ specifies the flag to check. 155 * This parameter can be one of the following values: 156 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 157 * was received from the WKUP pin or from the RTC alarm (Alarm A 158 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 159 * An additional wakeup event is detected if the WKUP pin is enabled 160 * (by setting the EWUP bit) when the WKUP pin level is already high. 161 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 162 * resumed from StandBy mode. 163 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 164 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 165 * For this reason, this bit is equal to 0 after Standby or reset 166 * until the PVDE bit is set. 167 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 168 * when the device wakes up from Standby mode or by a system reset 169 * or power reset. 170 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage 171 * scaling output selection is ready. 172 * @retval The new state of __FLAG__ (TRUE or FALSE). 173 */ 174 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 175 176 /** @brief Clear the PWR's pending flags. 177 * @param __FLAG__ specifies the flag to clear. 178 * This parameter can be one of the following values: 179 * @arg PWR_FLAG_WU: Wake Up flag 180 * @arg PWR_FLAG_SB: StandBy flag 181 */ 182 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 183 184 /** 185 * @brief Enable the PVD Exti Line 16. 186 * @retval None. 187 */ 188 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 189 190 /** 191 * @brief Disable the PVD EXTI Line 16. 192 * @retval None. 193 */ 194 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 195 196 /** 197 * @brief Enable event on PVD Exti Line 16. 198 * @retval None. 199 */ 200 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 201 202 /** 203 * @brief Disable event on PVD Exti Line 16. 204 * @retval None. 205 */ 206 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 207 208 /** 209 * @brief Enable the PVD Extended Interrupt Rising Trigger. 210 * @retval None. 211 */ 212 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 213 214 /** 215 * @brief Disable the PVD Extended Interrupt Rising Trigger. 216 * @retval None. 217 */ 218 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 219 220 /** 221 * @brief Enable the PVD Extended Interrupt Falling Trigger. 222 * @retval None. 223 */ 224 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 225 226 227 /** 228 * @brief Disable the PVD Extended Interrupt Falling Trigger. 229 * @retval None. 230 */ 231 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 232 233 234 /** 235 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 236 * @retval None. 237 */ 238 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\ 239 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\ 240 }while(0U) 241 242 /** 243 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 244 * This parameter can be: 245 * @retval None. 246 */ 247 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\ 248 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\ 249 }while(0U) 250 251 /** 252 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 253 * @retval EXTI PVD Line Status. 254 */ 255 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 256 257 /** 258 * @brief Clear the PVD Exti flag. 259 * @retval None. 260 */ 261 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 262 263 /** 264 * @brief Generates a Software interrupt on PVD EXTI line. 265 * @retval None 266 */ 267 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 268 269 /** 270 * @} 271 */ 272 273 /* Include PWR HAL Extension module */ 274 #include "stm32f4xx_hal_pwr_ex.h" 275 276 /* Exported functions --------------------------------------------------------*/ 277 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 278 * @{ 279 */ 280 281 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 282 * @{ 283 */ 284 /* Initialization and de-initialization functions *****************************/ 285 void HAL_PWR_DeInit(void); 286 void HAL_PWR_EnableBkUpAccess(void); 287 void HAL_PWR_DisableBkUpAccess(void); 288 /** 289 * @} 290 */ 291 292 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 293 * @{ 294 */ 295 /* Peripheral Control functions **********************************************/ 296 /* PVD configuration */ 297 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 298 void HAL_PWR_EnablePVD(void); 299 void HAL_PWR_DisablePVD(void); 300 301 /* WakeUp pins configuration */ 302 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 303 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 304 305 /* Low Power modes entry */ 306 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 307 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 308 void HAL_PWR_EnterSTANDBYMode(void); 309 310 /* Power PVD IRQ Handler */ 311 void HAL_PWR_PVD_IRQHandler(void); 312 void HAL_PWR_PVDCallback(void); 313 314 /* Cortex System Control functions *******************************************/ 315 void HAL_PWR_EnableSleepOnExit(void); 316 void HAL_PWR_DisableSleepOnExit(void); 317 void HAL_PWR_EnableSEVOnPend(void); 318 void HAL_PWR_DisableSEVOnPend(void); 319 /** 320 * @} 321 */ 322 323 /** 324 * @} 325 */ 326 327 /* Private types -------------------------------------------------------------*/ 328 /* Private variables ---------------------------------------------------------*/ 329 /* Private constants ---------------------------------------------------------*/ 330 /** @defgroup PWR_Private_Constants PWR Private Constants 331 * @{ 332 */ 333 334 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 335 * @{ 336 */ 337 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 338 /** 339 * @} 340 */ 341 342 /** @defgroup PWR_register_alias_address PWR Register alias address 343 * @{ 344 */ 345 /* ------------- PWR registers bit address in the alias region ---------------*/ 346 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 347 #define PWR_CR_OFFSET 0x00U 348 #define PWR_CSR_OFFSET 0x04U 349 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 350 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 351 /** 352 * @} 353 */ 354 355 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 356 * @{ 357 */ 358 /* --- CR Register ---*/ 359 /* Alias word address of DBP bit */ 360 #define DBP_BIT_NUMBER PWR_CR_DBP_Pos 361 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U)) 362 363 /* Alias word address of PVDE bit */ 364 #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos 365 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U)) 366 367 /* Alias word address of VOS bit */ 368 #define VOS_BIT_NUMBER PWR_CR_VOS_Pos 369 #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U)) 370 /** 371 * @} 372 */ 373 374 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 375 * @{ 376 */ 377 /* --- CSR Register ---*/ 378 /* Alias word address of EWUP bit */ 379 #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos 380 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U)) 381 /** 382 * @} 383 */ 384 385 /** 386 * @} 387 */ 388 /* Private macros ------------------------------------------------------------*/ 389 /** @defgroup PWR_Private_Macros PWR Private Macros 390 * @{ 391 */ 392 393 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 394 * @{ 395 */ 396 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 397 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 398 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 399 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 400 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 401 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 402 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 403 ((MODE) == PWR_PVD_MODE_NORMAL)) 404 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 405 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 406 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 407 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 408 /** 409 * @} 410 */ 411 412 /** 413 * @} 414 */ 415 416 /** 417 * @} 418 */ 419 420 /** 421 * @} 422 */ 423 424 #ifdef __cplusplus 425 } 426 #endif 427 428 429 #endif /* __STM32F4xx_HAL_PWR_H */ 430 431 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 432