| /btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/ |
| H A D | stm32f4xx_ll_dma.h | 52 (uint8_t)(DMA1_Stream3_BASE - DMA1_BASE),
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
| H A D | stm32f410rx.h | 623 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
691 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f410tx.h | 616 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
681 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f410cx.h | 623 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
691 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f401xe.h | 705 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
793 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f401xc.h | 705 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
793 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f411xe.h | 707 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
796 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f412cx.h | 879 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
985 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f405xx.h | 902 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1017 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f415xx.h | 970 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1088 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f412zx.h | 928 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1042 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f407xx.h | 998 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1119 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f412vx.h | 928 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1040 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f413xx.h | 1032 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1171 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f423xx.h | 1066 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1206 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f412rx.h | 925 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1036 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f417xx.h | 1066 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1190 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f446xx.h | 1015 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1137 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f427xx.h | 1078 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1211 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f437xx.h | 1150 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1286 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f429xx.h | 1131 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1267 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f439xx.h | 1201 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1340 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f469xx.h | 1222 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1358 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| H A D | stm32f479xx.h | 1292 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1431 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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| /btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
| H A D | stm32f407xx.h | 1014 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL) macro
1135 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
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