| /btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/ |
| H A D | stm32f4xx_ll_dma.h | 51 (uint8_t)(DMA1_Stream2_BASE - DMA1_BASE),
|
| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
| H A D | stm32f410rx.h | 622 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
690 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f410tx.h | 615 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
680 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f410cx.h | 622 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
690 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f401xe.h | 704 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
792 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f401xc.h | 704 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
792 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f411xe.h | 706 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
795 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f412cx.h | 878 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
984 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f405xx.h | 901 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1016 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f415xx.h | 969 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1087 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f412zx.h | 927 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1041 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f407xx.h | 997 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1118 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f412vx.h | 927 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1039 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f413xx.h | 1031 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1170 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f423xx.h | 1065 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1205 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f412rx.h | 924 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1035 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f417xx.h | 1065 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1189 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f446xx.h | 1014 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1136 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f427xx.h | 1077 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1210 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f437xx.h | 1149 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1285 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f429xx.h | 1130 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1266 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f439xx.h | 1200 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1339 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f469xx.h | 1221 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1357 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| H A D | stm32f479xx.h | 1291 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1430 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|
| /btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
| H A D | stm32f407xx.h | 1013 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL) macro
1134 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
|