Home
last modified time | relevance | path

Searched refs:DMA1_Stream1_BASE (Results 1 – 25 of 25) sorted by relevance

/btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/
H A Dstm32f4xx_ll_dma.h50 (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE),
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h621 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
689 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f410tx.h614 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
679 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f410cx.h621 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
689 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f401xe.h703 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
791 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f401xc.h703 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
791 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f411xe.h705 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
794 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f412cx.h877 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
983 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f405xx.h900 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1015 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f415xx.h968 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1086 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f412zx.h926 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1040 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f407xx.h996 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1117 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f412vx.h926 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1038 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f413xx.h1030 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1169 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f423xx.h1064 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1204 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f412rx.h923 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1034 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f417xx.h1064 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1188 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f446xx.h1013 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1135 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f427xx.h1076 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1209 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f437xx.h1148 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1284 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f429xx.h1129 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1265 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f439xx.h1199 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1338 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f469xx.h1220 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1356 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
H A Dstm32f479xx.h1290 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1429 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h1012 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1133 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)