Searched +full:qcom +full:- +full:sar2130p +full:- +full:tlmm +full:- +full:state (Results 1 – 3 of 3) sorted by relevance
| /linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,sar2130p-tlmm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sar2130p-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SAR2130P TLMM block
10 - Dmitry Baryshkov <[email protected]>
13 Top Level Mode Multiplexer pin controller in Qualcomm SAR2130P SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sar2130p-tlmm
28 gpio-reserved-ranges:
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| /linux-6.14.4/arch/arm64/boot/dts/qcom/ |
| D | sar2130p-qar2130p.dts | 1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include "sar2130p.dtsi"
15 compatible = "qcom,qar2130p", "qcom,sar2130p";
16 chassis-type = "embedded";
28 stdout-path = "serial0:115200n8";
31 vph_pwr: regulator-vph-pwr {
32 compatible = "regulator-fixed";
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| D | sar2130p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sar2130p-gcc.h>
8 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h>
9 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,sar2130p-rpmh.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
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