1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2024, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10#include "sar2130p.dtsi" 11#include "pm8150.dtsi" 12 13/ { 14 model = "Qualcomm Snapdragon AR2 Gen1 Smart Viewer Development Kit"; 15 compatible = "qcom,qar2130p", "qcom,sar2130p"; 16 chassis-type = "embedded"; 17 18 aliases { 19 serial0 = &uart11; 20 serial1 = &uart7; 21 i2c0 = &i2c8; 22 i2c1 = &i2c10; 23 mmc1 = &sdhc_1; 24 spi0 = &spi0; 25 }; 26 27 chosen { 28 stdout-path = "serial0:115200n8"; 29 }; 30 31 vph_pwr: regulator-vph-pwr { 32 compatible = "regulator-fixed"; 33 regulator-name = "vph_pwr"; 34 regulator-min-microvolt = <3700000>; 35 regulator-max-microvolt = <3700000>; 36 regulator-always-on; 37 }; 38 39 /* pm3003a on I2C0, should not be controlled */ 40 vreg_ext_1p3: regulator-ext-1p3 { 41 compatible = "regulator-fixed"; 42 regulator-name = "vph_ext_1p3"; 43 regulator-min-microvolt = <1300000>; 44 regulator-max-microvolt = <1300000>; 45 regulator-always-on; 46 vin-supply = <&vph_pwr>; 47 }; 48 49 /* EBI rail, used as LDO input, can not be part of PMIC config */ 50 vreg_s10a_0p89: regulator-s10a-0p89 { 51 compatible = "regulator-fixed"; 52 regulator-name = "vph_s10a_0p89"; 53 regulator-min-microvolt = <890000>; 54 regulator-max-microvolt = <890000>; 55 regulator-always-on; 56 vin-supply = <&vph_pwr>; 57 }; 58 59 thermal-zones { 60 sar2130p-thermal { 61 thermal-sensors = <&pm8150_adc_tm 1>; 62 63 trips { 64 active-config0 { 65 temperature = <100000>; 66 hysteresis = <1000>; 67 type = "critical"; 68 }; 69 }; 70 }; 71 72 wifi-thermal { 73 thermal-sensors = <&pm8150_adc_tm 2>; 74 75 trips { 76 active-config0 { 77 temperature = <52000>; 78 hysteresis = <4000>; 79 type = "passive"; 80 }; 81 }; 82 }; 83 84 xo-thermal { 85 thermal-sensors = <&pm8150_adc_tm 0>; 86 87 trips { 88 active-config0 { 89 temperature = <50000>; 90 hysteresis = <4000>; 91 type = "passive"; 92 }; 93 }; 94 }; 95 }; 96 97 wcn7850-pmu { 98 compatible = "qcom,wcn7850-pmu"; 99 100 pinctrl-0 = <&wlan_en_state>, <&bt_en_state>; 101 pinctrl-names = "default"; 102 103 wlan-enable-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; 104 bt-enable-gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; 105 106 vdd-supply = <&vreg_s4a_0p95>; 107 vddio-supply = <&vreg_l15a_1p8>; 108 vddaon-supply = <&vreg_s4a_0p95>; 109 vdddig-supply = <&vreg_s4a_0p95>; 110 vddrfa1p2-supply = <&vreg_s4a_0p95>; 111 vddrfa1p8-supply = <&vreg_s5a_1p88>; 112 113 regulators { 114 vreg_pmu_rfa_cmn: ldo0 { 115 regulator-name = "vreg_pmu_rfa_cmn"; 116 }; 117 118 vreg_pmu_aon_0p59: ldo1 { 119 regulator-name = "vreg_pmu_aon_0p59"; 120 }; 121 122 vreg_pmu_wlcx_0p8: ldo2 { 123 regulator-name = "vreg_pmu_wlcx_0p8"; 124 }; 125 126 vreg_pmu_wlmx_0p85: ldo3 { 127 regulator-name = "vreg_pmu_wlmx_0p85"; 128 }; 129 130 vreg_pmu_btcmx_0p85: ldo4 { 131 regulator-name = "vreg_pmu_btcmx_0p85"; 132 }; 133 134 vreg_pmu_rfa_0p8: ldo5 { 135 regulator-name = "vreg_pmu_rfa_0p8"; 136 }; 137 138 vreg_pmu_rfa_1p2: ldo6 { 139 regulator-name = "vreg_pmu_rfa_1p2"; 140 }; 141 142 vreg_pmu_rfa_1p8: ldo7 { 143 regulator-name = "vreg_pmu_rfa_1p8"; 144 }; 145 146 vreg_pmu_pcie_0p9: ldo8 { 147 regulator-name = "vreg_pmu_pcie_0p9"; 148 }; 149 150 vreg_pmu_pcie_1p8: ldo9 { 151 regulator-name = "vreg_pmu_pcie_1p8"; 152 }; 153 }; 154 }; 155}; 156 157&apps_rsc { 158 regulators-0 { 159 compatible = "qcom,pm8150-rpmh-regulators"; 160 qcom,pmic-id = "a"; 161 162 vdd-s1-supply = <&vph_pwr>; 163 vdd-s2-supply = <&vph_pwr>; 164 vdd-s3-supply = <&vph_pwr>; 165 vdd-s4-supply = <&vph_pwr>; 166 vdd-s5-supply = <&vph_pwr>; 167 vdd-s6-supply = <&vph_pwr>; 168 vdd-s7-supply = <&vph_pwr>; 169 vdd-s8-supply = <&vph_pwr>; 170 vdd-s9-supply = <&vph_pwr>; 171 vdd-s10-supply = <&vph_pwr>; 172 vdd-l1-l8-l11-supply = <&vreg_s4a_0p95>; 173 vdd-l3-l4-l5-l18-supply = <&vreg_ext_1p3>; 174 vdd-l6-l9-supply = <&vreg_s10a_0p89>; 175 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_1p88>; 176 177 vreg_s4a_0p95: smps6 { 178 regulator-name = "vreg_s4a_0p95"; 179 regulator-min-microvolt = <950000>; 180 regulator-max-microvolt = <1170000>; 181 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 182 }; 183 184 vreg_s5a_1p88: smps5 { 185 regulator-name = "vreg_s5a_1p88"; 186 regulator-min-microvolt = <1856000>; 187 regulator-max-microvolt = <2040000>; 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 189 }; 190 191 vreg_l1a_0p91: ldo1 { 192 regulator-name = "vreg_l1a_0p91"; 193 regulator-min-microvolt = <912000>; 194 regulator-max-microvolt = <920000>; 195 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 196 }; 197 198 vreg_l2a_3p1: ldo2 { 199 regulator-name = "vreg_l2a_3p1"; 200 regulator-min-microvolt = <3080000>; 201 regulator-max-microvolt = <3544000>; 202 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 203 }; 204 205 vreg_l3a_1p2: ldo3 { 206 regulator-name = "vreg_l3a_1p2"; 207 regulator-min-microvolt = <1200000>; 208 regulator-max-microvolt = <1304000>; 209 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 210 }; 211 212 /* ldo4 1.26 - system ? */ 213 214 vreg_l5a_1p13: ldo5 { 215 regulator-name = "vreg_l5a_1p13"; 216 regulator-min-microvolt = <1128000>; 217 regulator-max-microvolt = <1170000>; 218 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 219 }; 220 221 vreg_l6a_0p6: ldo6 { 222 regulator-name = "vreg_l6a_0p6"; 223 regulator-min-microvolt = <600000>; 224 regulator-max-microvolt = <650000>; 225 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 226 }; 227 228 vreg_l7a_1p8: ldo7 { 229 regulator-name = "vreg_l7a_1p8"; 230 regulator-min-microvolt = <1800000>; 231 regulator-max-microvolt = <1950000>; 232 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 233 }; 234 235 vreg_l8a_0p88: ldo8 { 236 regulator-name = "vreg_l8a_0p88"; 237 regulator-min-microvolt = <880000>; 238 regulator-max-microvolt = <950000>; 239 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 240 }; 241 242 /* ldo9 - LCX */ 243 244 vreg_l10a_2p95: ldo10 { 245 regulator-name = "vreg_l10a_2p95"; 246 regulator-min-microvolt = <2952000>; 247 regulator-max-microvolt = <3544000>; 248 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 249 }; 250 251 /* ldo11 - LMX */ 252 253 vreg_l12a_1p8: ldo12 { 254 regulator-name = "vreg_l12a_1p8"; 255 regulator-min-microvolt = <1800000>; 256 regulator-max-microvolt = <1880000>; 257 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 258 }; 259 260 /* no ldo13 */ 261 262 vreg_l14a_1p8: ldo14 { 263 regulator-name = "vreg_l14a_1p8"; 264 regulator-min-microvolt = <1800000>; 265 regulator-max-microvolt = <1880000>; 266 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 267 }; 268 269 vreg_l15a_1p8: ldo15 { 270 regulator-name = "vreg_l15a_1p8"; 271 regulator-min-microvolt = <1800000>; 272 regulator-max-microvolt = <1800000>; 273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 274 }; 275 276 /* no ldo16 - system */ 277 278 vreg_l17a_3p26: ldo17 { 279 regulator-name = "vreg_l17a_3p26"; 280 regulator-min-microvolt = <3200000>; 281 regulator-max-microvolt = <3544000>; 282 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 283 }; 284 285 vreg_l18a_1p2: ldo18 { 286 regulator-name = "vreg_l18a_1p2"; 287 regulator-min-microvolt = <1200000>; 288 regulator-max-microvolt = <1304000>; 289 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 290 }; 291 }; 292 293}; 294 295&gpi_dma0 { 296 status = "okay"; 297}; 298 299&gpi_dma1 { 300 status = "okay"; 301}; 302 303&gpu { 304 status = "okay"; 305}; 306 307&gpu_zap_shader { 308 firmware-name = "qcom/sar2130p/a620_zap.mbn"; 309}; 310 311&pon_pwrkey { 312 status = "okay"; 313}; 314 315&pon_resin { 316 linux,code = <KEY_VOLUMEDOWN>; 317 318 status = "okay"; 319}; 320 321&qupv3_id_0 { 322 status = "okay"; 323}; 324 325&qupv3_id_1 { 326 status = "okay"; 327}; 328 329&i2c4 { 330 clock-frequency = <400000>; 331 332 status = "okay"; 333}; 334 335&i2c8 { 336 clock-frequency = <400000>; 337 338 status = "okay"; 339 340 ptn3222: redriver@4f { 341 compatible = "nxp,ptn3222"; 342 reg = <0x4f>; 343 344 reset-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; 345 346 vdd3v3-supply = <&vreg_l2a_3p1>; 347 vdd1v8-supply = <&vreg_l15a_1p8>; 348 349 #phy-cells = <0>; 350 }; 351}; 352 353&i2c10 { 354 clock-frequency = <400000>; 355 356 status = "okay"; 357}; 358 359&pcie0 { 360 perst-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>; 361 wake-gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>; 362 363 pinctrl-0 = <&pcie0_default_state>; 364 pinctrl-names = "default"; 365 366 status = "okay"; 367}; 368 369&pcieport0 { 370 wifi@0 { 371 compatible = "pci17cb,1107"; 372 reg = <0x10000 0x0 0x0 0x0 0x0>; 373 374 vddaon-supply = <&vreg_pmu_aon_0p59>; 375 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 376 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 377 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 378 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 379 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 380 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 381 vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; 382 vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; 383 }; 384}; 385 386&pcie0_phy { 387 vdda-phy-supply = <&vreg_l8a_0p88>; 388 vdda-pll-supply = <&vreg_l3a_1p2>; 389 390 status = "okay"; 391}; 392 393&pm8150_adc { 394 channel@4c { 395 reg = <ADC5_XO_THERM_100K_PU>; 396 qcom,ratiometric; 397 qcom,hw-settle-time = <200>; 398 label = "xo_therm"; 399 }; 400 401 channel@4d { 402 reg = <ADC5_AMUX_THM1_100K_PU>; 403 qcom,ratiometric; 404 qcom,hw-settle-time = <200>; 405 qcom,pre-scaling = <1 1>; 406 label = "skin_therm"; 407 }; 408 409 channel@4e { 410 /* msm-5.10 uses ADC5_AMUX_THM2 / 0x0e, although there is a pullup */ 411 reg = <ADC5_AMUX_THM2_100K_PU>; 412 qcom,hw-settle-time = <200>; 413 qcom,pre-scaling = <1 1>; 414 label = "wifi_therm"; 415 }; 416}; 417 418&pm8150_adc_tm { 419 status = "okay"; 420 421 xo-therm@0 { 422 reg = <0>; 423 io-channels = <&pm8150_adc ADC5_XO_THERM_100K_PU>; 424 qcom,ratiometric; 425 qcom,hw-settle-time-us = <200>; 426 }; 427 428 skin-therm@1 { 429 reg = <1>; 430 io-channels = <&pm8150_adc ADC5_AMUX_THM1_100K_PU>; 431 qcom,ratiometric; 432 qcom,hw-settle-time-us = <200>; 433 }; 434 435 wifi-therm@2 { 436 reg = <2>; 437 /* msm-5.10 uses ADC5_AMUX_THM2, although there is a pullup */ 438 io-channels = <&pm8150_adc ADC5_AMUX_THM2_100K_PU>; 439 qcom,hw-settle-time-us = <200>; 440 }; 441}; 442 443&remoteproc_adsp { 444 firmware-name = "qcom/sar2130p/adsp.mbn"; 445 446 status = "okay"; 447}; 448 449&sdhc_1 { 450 vmmc-supply = <&vreg_l10a_2p95>; 451 vqmmc-supply = <&vreg_l7a_1p8>; 452 453 status = "okay"; 454}; 455 456&tlmm { 457 bt_en_state: bt-enable-state { 458 pins = "gpio46"; 459 function = "gpio"; 460 drive-strength = <16>; 461 bias-disable; 462 }; 463 464 pcie0_default_state: pcie0-default-state { 465 perst-pins { 466 pins = "gpio55"; 467 function = "gpio"; 468 drive-strength = <2>; 469 bias-pull-down; 470 }; 471 472 clkreq-pins { 473 pins = "gpio56"; 474 function = "pcie0_clkreqn"; 475 drive-strength = <2>; 476 bias-pull-up; 477 }; 478 479 wake-pins { 480 pins = "gpio57"; 481 function = "gpio"; 482 drive-strength = <2>; 483 bias-pull-up; 484 }; 485 }; 486 487 pcie1_default_state: pcie1-default-state { 488 perst-pins { 489 pins = "gpio58"; 490 function = "gpio"; 491 drive-strength = <2>; 492 bias-pull-down; 493 }; 494 495 clkreq-pins { 496 pins = "gpio59"; 497 function = "pcie1_clkreqn"; 498 drive-strength = <2>; 499 bias-pull-up; 500 }; 501 502 wake-pins { 503 pins = "gpio60"; 504 function = "gpio"; 505 drive-strength = <2>; 506 bias-pull-up; 507 }; 508 }; 509 510 wlan_en_state: wlan-enable-state { 511 pins = "gpio45"; 512 function = "gpio"; 513 drive-strength = <16>; 514 bias-disable; 515 }; 516}; 517 518&uart7 { 519 status = "okay"; 520 521 bluetooth { 522 compatible = "qcom,wcn7850-bt"; 523 524 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 525 vddaon-supply = <&vreg_pmu_aon_0p59>; 526 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 527 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 528 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 529 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 530 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 531 532 max-speed = <3200000>; 533 }; 534}; 535 536&uart11 { 537 status = "okay"; 538}; 539 540&usb_1 { 541 status = "okay"; 542}; 543 544&usb_1_hsphy { 545 vdd-supply = <&vreg_l8a_0p88>; 546 vdda12-supply = <&vreg_l3a_1p2>; 547 548 phys = <&ptn3222>; 549 550 status = "okay"; 551}; 552 553&usb_dp_qmpphy { 554 vdda-phy-supply = <&vreg_l3a_1p2>; 555 vdda-pll-supply = <&vreg_l1a_0p91>; 556 557 status = "okay"; 558}; 559