Lines Matching +full:qcom +full:- +full:sar2130p +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sar2130p-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SAR2130P TLMM block
10 - Dmitry Baryshkov <[email protected]>
13 Top Level Mode Multiplexer pin controller in Qualcomm SAR2130P SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sar2130p-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
38 - $ref: "#/$defs/qcom-sar2130p-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sar2130p-tlmm-state"
45 qcom-sar2130p-tlmm-state:
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
61 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk ]
98 - pins
101 - compatible
102 - reg
107 - |
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
110 compatible = "qcom,sar2130p-tlmm";
112 gpio-controller;
113 #gpio-cells = <2>;
114 gpio-ranges = <&tlmm 0 0 156>;
115 interrupt-controller;
116 #interrupt-cells = <2>;
119 gpio-wo-state {
124 uart-w-state {
125 rx-pins {
128 bias-pull-up;
131 tx-pins {
134 bias-disable;