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/aosp_15_r20/external/tensorflow/tensorflow/core/platform/
H A Dram_file_system_test.py41 file_io.create_dir_v2('ram://testdirectory')
42 file_io.delete_recursively_v2('ram://testdirectory')
45 file_io.create_dir_v2('ram://testdirectory')
46 file_io.create_dir_v2('ram://testdirectory/subdir1')
47 file_io.create_dir_v2('ram://testdirectory/subdir2')
48 file_io.create_dir_v2('ram://testdirectory/subdir1/subdir3')
49 with gfile.GFile('ram://testdirectory/subdir1/subdir3/a.txt', 'w') as f:
51 file_io.delete_recursively_v2('ram://testdirectory')
52 self.assertEqual(gfile.Glob('ram://testdirectory/*'), [])
55 with gfile.GFile('ram://a.txt', 'w') as f:
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/aosp_15_r20/external/aws-sdk-java-v2/services/ram/src/main/resources/codegen-resources/
H A Dendpoint-tests.json7 "url": "https://ram.af-south-1.amazonaws.com"
20 "url": "https://ram.ap-east-1.amazonaws.com"
33 "url": "https://ram.ap-northeast-1.amazonaws.com"
46 "url": "https://ram.ap-northeast-2.amazonaws.com"
59 "url": "https://ram.ap-northeast-3.amazonaws.com"
72 "url": "https://ram.ap-south-1.amazonaws.com"
85 "url": "https://ram.ap-southeast-1.amazonaws.com"
98 "url": "https://ram.ap-southeast-2.amazonaws.com"
111 "url": "https://ram.ap-southeast-3.amazonaws.com"
124 "url": "https://ram.ca-central-1.amazonaws.com"
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/aosp_15_r20/external/cpuinfo/test/dmesg/
H A Dzenfone-2.log7 [ 0.000000] e820: BIOS-provided physical RAM map:
50 [ 0.000000] total RAM covered: 4065M
51 [ 0.000000] gran_size: 64K chunk_size: 64K num_reg: 8 lose cover RAM: 3063M
52 [ 0.000000] gran_size: 64K chunk_size: 128K num_reg: 8 lose cover RAM: 3063M
53 [ 0.000000] gran_size: 64K chunk_size: 256K num_reg: 8 lose cover RAM: 3063M
54 [ 0.000000] gran_size: 64K chunk_size: 512K num_reg: 8 lose cover RAM: 3063M
55 [ 0.000000] gran_size: 64K chunk_size: 1M num_reg: 8 lose cover RAM: 3063M
56 [ 0.000000] gran_size: 64K chunk_size: 2M num_reg: 8 lose cover RAM: 3063M
57 [ 0.000000] gran_size: 64K chunk_size: 4M num_reg: 8 lose cover RAM: 3831M
58 [ 0.000000] gran_size: 64K chunk_size: 8M num_reg: 8 lose cover RAM: 3983M
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/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/
H A DRamDisk.h2 This file defines the EFI RAM Disk Protocol.
16 // EFI RAM Disk Protocol GUID value
27 Register a RAM disk with specified address, size and type.
29 @param[in] RamDiskBase The base address of registered RAM disk.
30 @param[in] RamDiskSize The size of registered RAM disk.
31 @param[in] RamDiskType The type of registered RAM disk. The GUID can be
38 of the RAM disk device.
40 DevicePath is created by appending a RAM disk node
42 NULL, the returned DevicePath is a RAM disk device
47 @retval EFI_SUCCESS The RAM disk is registered successfully.
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/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/
H A DRamDisk.h2 This file defines the EFI RAM Disk Protocol.
16 // EFI RAM Disk Protocol GUID value
27 Register a RAM disk with specified address, size and type.
29 @param[in] RamDiskBase The base address of registered RAM disk.
30 @param[in] RamDiskSize The size of registered RAM disk.
31 @param[in] RamDiskType The type of registered RAM disk. The GUID can be
38 of the RAM disk device.
40 DevicePath is created by appending a RAM disk node
42 NULL, the returned DevicePath is a RAM disk device
47 @retval EFI_SUCCESS The RAM disk is registered successfully.
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/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Protocol/
H A DRamDisk.h2 This file defines the EFI RAM Disk Protocol.
16 // EFI RAM Disk Protocol GUID value
27 Register a RAM disk with specified address, size and type.
29 @param[in] RamDiskBase The base address of registered RAM disk.
30 @param[in] RamDiskSize The size of registered RAM disk.
31 @param[in] RamDiskType The type of registered RAM disk. The GUID can be
38 of the RAM disk device.
40 DevicePath is created by appending a RAM disk node
42 NULL, the returned DevicePath is a RAM disk device
47 @retval EFI_SUCCESS The RAM disk is registered successfully.
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/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Protocol/
H A DRamDisk.h2 This file defines the EFI RAM Disk Protocol.
22 // EFI RAM Disk Protocol GUID value
33 Register a RAM disk with specified address, size and type.
35 @param[in] RamDiskBase The base address of registered RAM disk.
36 @param[in] RamDiskSize The size of registered RAM disk.
37 @param[in] RamDiskType The type of registered RAM disk. The GUID can be
44 of the RAM disk device.
46 DevicePath is created by appending a RAM disk node
48 NULL, the returned DevicePath is a RAM disk device
53 @retval EFI_SUCCESS The RAM disk is registered successfully.
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/aosp_15_r20/external/aws-sdk-java-v2/core/regions/target/generated-sources/sdk/software/amazon/awssdk/regions/servicemetadata/
H A DRamServiceMetadata.java37 private static final String ENDPOINT_PREFIX = "ram";
87 "ram-fips.ca-central-1.amazonaws.com")
89 "ram-fips.ca-west-1.amazonaws.com")
91 "ram-fips.ca-central-1.amazonaws.com")
92 ….put(ServiceEndpointKey.builder().region(Region.of("fips-us-east-1")).build(), "ram-fips.us-east-1…
93 ….put(ServiceEndpointKey.builder().region(Region.of("fips-us-east-2")).build(), "ram-fips.us-east-2…
94 ….put(ServiceEndpointKey.builder().region(Region.of("fips-us-west-1")).build(), "ram-fips.us-west-1…
95 ….put(ServiceEndpointKey.builder().region(Region.of("fips-us-west-2")).build(), "ram-fips.us-west-2…
97 "ram-fips.us-east-1.amazonaws.com")
99 "ram-fips.us-east-2.amazonaws.com")
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/aosp_15_r20/external/ms-tpm-20-ref/TPMCmd/tpm/src/subsystem/
H A DNvDynamic.c52 // When an Index has the orderly attribute, the data is kept in RAM. This RAM is
56 // The attributes of an orderly index are maintained in RAM memory in order to
61 // of the index is kept in RAM. When an orderly Index is created or deleted, the
62 // RAM data is copied to NV backing store so that the image in the backing store
63 // matches the layout of RAM. In normal operation. The RAM data is also copied on
65 // to the backing store for RAM is when a counter is first written (TPMA_NV_WRITTEN
69 // the 'gp' PERSISTENT_DATA structure in RAM and mapped to locations in NV.
382 //** RAM-based NV Index Data Access Functions
385 // The data layout in ram buffer is {size of(NV_handle + attributes + data
387 // for each NV Index data stored in RAM.
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/aosp_15_r20/external/pigweed/pw_boot_cortex_m/
H A Dbasic_cortex_m.ld18 * ARMv8-M cores that have on-board memory-mapped RAM and FLASH. For more
81 RAM(rwx) : \
192 } >RAM AT> FLASH
220 } >RAM
228 } >RAM
241 HIDDEN(_stack_size = ORIGIN(RAM) + LENGTH(RAM) - .);
245 "Error: Not enough RAM for desired minimum stack size.");
248 } >RAM
250 /* Represents unused space in the RAM segment. This MUST be the last section
251 * assigned to the RAM region.
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/aosp_15_r20/external/pigweed/pw_rust/examples/linker_scripts/
H A Dqemu-rust-nrf51822.ld18 * ARMv8-M cores that have on-board memory-mapped RAM and FLASH. For more
43 RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 16K
156 } >RAM AT> FLASH
184 } >RAM
192 } >RAM
205 HIDDEN(_stack_size = ORIGIN(RAM) + LENGTH(RAM) - .);
209 "Error: Not enough RAM for desired minimum stack size.");
212 } >RAM
214 /* Represents unused space in the RAM segment. This MUST be the last section
215 * assigned to the RAM region.
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H A Dqemu-rust-lm3s6965.ld18 * ARMv8-M cores that have on-board memory-mapped RAM and FLASH. For more
43 RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 64K
156 } >RAM AT> FLASH
184 } >RAM
192 } >RAM
205 HIDDEN(_stack_size = ORIGIN(RAM) + LENGTH(RAM) - .);
209 "Error: Not enough RAM for desired minimum stack size.");
212 } >RAM
214 /* Represents unused space in the RAM segment. This MUST be the last section
215 * assigned to the RAM region.
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/aosp_15_r20/external/trusty/arm-trusted-firmware/bl32/sp_min/
Dsp_min.ld.S15 RAM (rwx): ORIGIN = BL32_BASE, LENGTH = BL32_LIMIT - BL32_BASE
23 RAM_REGION_START = ORIGIN(RAM);
24 RAM_REGION_LENGTH = LENGTH(RAM);
45 } >RAM
50 } >RAM
54 } >RAM
70 } >RAM
100 } >RAM
108 DATA_SECTION >RAM
109 RELA_SECTION >RAM
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/aosp_15_r20/external/trusty/arm-trusted-firmware/bl2/
Dbl2.ld.S15 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
19 RAM_REGION_START = ORIGIN(RAM);
20 RAM_REGION_LENGTH = LENGTH(RAM);
46 } >RAM
51 } >RAM
55 } >RAM
68 } >RAM
94 } >RAM
99 DATA_SECTION >RAM
100 STACK_SECTION >RAM
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/aosp_15_r20/external/trusty/arm-trusted-firmware/bl2u/
Dbl2u.ld.S17 RAM (rwx): ORIGIN = BL2U_BASE, LENGTH = BL2U_LIMIT - BL2U_BASE
21 RAM_REGION_START = ORIGIN(RAM);
22 RAM_REGION_LENGTH = LENGTH(RAM);
43 } >RAM
48 } >RAM
52 } >RAM
63 } >RAM
89 } >RAM
94 DATA_SECTION >RAM
95 STACK_SECTION >RAM
[all …]
/aosp_15_r20/external/arm-trusted-firmware/drivers/arm/gic/v3/
H A Dgic600ae_fmu.c33 "SPI RAM DED error",
34 "SGI RAM DED error",
36 "LPI RAM DED error",
40 "SPI RAM address decode error",
41 "SGI RAM address decode error",
43 "LPI RAM address decode error",
50 "SPI RAM SEC error",
51 "SGI RAM SEC error",
53 "LPI RAM SEC error",
69 "PPI RAM DED error",
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/aosp_15_r20/external/pigweed/pw_persistent_ram/
H A Ddocs.rst7 persistent RAM. By persistent RAM we are referring to memory which is not
24 Persistent RAM Placement
26 Persistent RAM is typically provided through specially carved out linker script
72 Persistent RAM Lifecycle Management
74 In order for persistent RAM containers to be as useful as possible, any
75 invalidation of persistent RAM and the containers therein should be executed
77 are initialized in RAM.
79 The preferred way to clear Persistent RAM is to simply zero entire persistent
80 RAM sections and/or memory regions. Pigweed's persistent containers have picked
89 1. Do not instantiate regular types/objects in persistent RAM, ensure integrity
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/aosp_15_r20/external/trusty/arm-trusted-firmware/bl32/tsp/
Dtsp.ld.S15 RAM (rwx): ORIGIN = TSP_SEC_MEM_BASE, LENGTH = TSP_SEC_MEM_SIZE
19 RAM_REGION_START = ORIGIN(RAM);
20 RAM_REGION_LENGTH = LENGTH(RAM);
41 } >RAM
54 } >RAM
80 } >RAM
85 DATA_SECTION >RAM
86 RELA_SECTION >RAM
92 STACK_SECTION >RAM
93 BSS_SECTION >RAM
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/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Ppi/
H A DTemporaryRamDone.h2 This file declares Temporary RAM Done PPI.
3 The PPI that provides a service to disable the use of Temporary RAM.
20 TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
23 @retval EFI_SUCCESS Use of Temporary RAM was disabled.
24 @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
35 /// disable the use of Temporary RAM. This service may only be called by the PEI Foundation after t…
36 /// transition from Temporary RAM to Permanent RAM is complete. This PPI provides an alternative
37 /// to the Temporary RAM Migration PPI for system architectures that allow Temporary RAM and
38 /// Permanent RAM to be enabled and accessed at the same time with no side effects.
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/
H A DTemporaryRamDone.h2 This file declares Temporary RAM Done PPI.
3 The PPI that provides a service to disable the use of Temporary RAM.
20 TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
23 @retval EFI_SUCCESS Use of Temporary RAM was disabled.
24 @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
35 /// disable the use of Temporary RAM. This service may only be called by the PEI Foundation after t…
36 /// transition from Temporary RAM to Permanent RAM is complete. This PPI provides an alternative
37 /// to the Temporary RAM Migration PPI for system architectures that allow Temporary RAM and
38 /// Permanent RAM to be enabled and accessed at the same time with no side effects.
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ppi/
H A DTemporaryRamDone.h2 This file declares Temporary RAM Done PPI.
3 The PPI that provides a service to disable the use of Temporary RAM.
20 TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
23 @retval EFI_SUCCESS Use of Temporary RAM was disabled.
24 @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
35 /// disable the use of Temporary RAM. This service may only be called by the PEI Foundation after t…
36 /// transition from Temporary RAM to Permanent RAM is complete. This PPI provides an alternative
37 /// to the Temporary RAM Migration PPI for system architectures that allow Temporary RAM and
38 /// Permanent RAM to be enabled and accessed at the same time with no side effects.
/aosp_15_r20/external/arm-trusted-firmware/bl32/sp_min/
H A Dsp_min.ld.S15 RAM (rwx): ORIGIN = BL32_BASE, LENGTH = BL32_LIMIT - BL32_BASE
36 } >RAM
41 } >RAM
45 } >RAM
59 } >RAM
83 } >RAM
94 DATA_SECTION >RAM
95 RELA_SECTION >RAM
101 STACK_SECTION >RAM
102 BSS_SECTION >RAM
[all …]
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Ppi/
H A DTemporaryRamDone.h2 This file declares Temporary RAM Done PPI.
3 The PPI that provides a service to disable the use of Temporary RAM.
26 TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
29 @retval EFI_SUCCESS Use of Temporary RAM was disabled.
30 @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
41 /// disable the use of Temporary RAM. This service may only be called by the PEI Foundation after t…
42 /// transition from Temporary RAM to Permanent RAM is complete. This PPI provides an alternative
43 /// to the Temporary RAM Migration PPI for system architectures that allow Temporary RAM and
44 /// Permanent RAM to be enabled and accessed at the same time with no side effects.
/aosp_15_r20/external/pigweed/targets/mimxrt595_evk_freertos/
H A Dmimxrt595_flash.ld77 RAM(rwx) : \
199 } >RAM AT> FLASH
227 } >RAM
235 } >RAM
247 HIDDEN(_stack_size = ORIGIN(RAM) + LENGTH(RAM) - .);
251 "Error: Not enough RAM for desired minimum stack size.");
254 } >RAM
256 /* Represents unused space in the RAM segment. This MUST be the last section
257 * assigned to the RAM region.
259 .RAM.unused_space (NOLOAD) : ALIGN(4)
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/aosp_15_r20/external/trusty/arm-trusted-firmware/drivers/arm/gic/v3/
Dgic600ae_fmu.c34 "SPI RAM DED error",
35 "SGI RAM DED error",
37 "LPI RAM DED error",
41 "SPI RAM address decode error",
42 "SGI RAM address decode error",
44 "LPI RAM address decode error",
51 "SPI RAM SEC error",
52 "SGI RAM SEC error",
54 "LPI RAM SEC error",
70 "PPI RAM DED error",
[all …]

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