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/linux-6.14.4/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra210-bpmp.txt30 reg = <0x0 0x70016000 0x0 0x2000
31 0x0 0x60001000 0x0 0x1000>;
/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dqcom,pcie-sc8180x.yaml89 reg = <0 0x01c00000 0 0x3000>,
90 <0 0x60000000 0 0xf1d>,
91 <0 0x60000f20 0 0xa8>,
92 <0 0x60001000 0 0x1000>,
93 <0 0x60100000 0 0x100000>;
99 ranges = <0x01000000 0x0 0x60200000 0x0 0x60200000 0x0 0x100000>,
100 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
102 bus-range = <0x00 0xff>;
104 linux,pci-domain = <0>;
149 interrupt-map-mask = <0 0 0 0x7>;
[all …]
Dqcom,pcie-sm8150.yaml90 reg = <0 0x01c00000 0 0x3000>,
91 <0 0x60000000 0 0xf1d>,
92 <0 0x60000f20 0 0xa8>,
93 <0 0x60001000 0 0x1000>,
94 <0 0x60100000 0 0x100000>;
96 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
97 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
99 bus-range = <0x00 0xff>;
101 linux,pci-domain = <0>;
135 interrupt-map-mask = <0 0 0 0x7>;
[all …]
Dqcom,pcie-sm8350.yaml92 reg = <0 0x01c00000 0 0x3000>,
93 <0 0x60000000 0 0xf1d>,
94 <0 0x60000f20 0 0xa8>,
95 <0 0x60001000 0 0x1000>,
96 <0 0x60100000 0 0x100000>;
98 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
99 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
101 bus-range = <0x00 0xff>;
103 linux,pci-domain = <0>;
139 interrupt-map-mask = <0 0 0 0x7>;
[all …]
Dqcom,pcie-sm8250.yaml102 reg = <0 0x01c00000 0 0x3000>,
103 <0 0x60000000 0 0xf1d>,
104 <0 0x60000f20 0 0xa8>,
105 <0 0x60001000 0 0x1000>,
106 <0 0x60100000 0 0x100000>,
107 <0 0x01c03000 0 0x1000>;
109 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
110 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
112 bus-range = <0x00 0xff>;
114 linux,pci-domain = <0>;
[all …]
Dqcom,pcie-sm8450.yaml99 reg = <0 0x01c00000 0 0x3000>,
100 <0 0x60000000 0 0xf1d>,
101 <0 0x60000f20 0 0xa8>,
102 <0 0x60001000 0 0x1000>,
103 <0 0x60100000 0 0x100000>;
105 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
106 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
108 bus-range = <0x00 0xff>;
110 linux,pci-domain = <0>;
154 interrupt-map-mask = <0 0 0 0x7>;
[all …]
Dqcom,pcie-sm8550.yaml103 reg = <0 0x01c00000 0 0x3000>,
104 <0 0x60000000 0 0xf1d>,
105 <0 0x60000f20 0 0xa8>,
106 <0 0x60001000 0 0x1000>,
107 <0 0x60100000 0 0x100000>;
109 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
110 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
112 bus-range = <0x00 0xff>;
114 linux,pci-domain = <0>;
149 interrupt-map-mask = <0 0 0 0x7>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/socionext/
Duniphier-ld4.dtsi18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
37 #clock-cells = <0>;
42 #clock-cells = <0>;
57 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
58 <0x506c0000 0x400>;
71 reg = <0x54006000 0x100>;
73 #size-cells = <0>;
76 pinctrl-0 = <&pinctrl_spi0>;
[all …]
Duniphier-sld8.dtsi18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
37 #clock-cells = <0>;
42 #clock-cells = <0>;
57 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
58 <0x506c0000 0x400>;
71 reg = <0x54006000 0x100>;
73 #size-cells = <0>;
76 pinctrl-0 = <&pinctrl_spi0>;
[all …]
Duniphier-pro4.dtsi18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
65 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
66 <0x506c0000 0x400>;
79 reg = <0x54006000 0x100>;
81 #size-cells = <0>;
84 pinctrl-0 = <&pinctrl_spi0>;
[all …]
Duniphier-pro5.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
118 #clock-cells = <0>;
123 #clock-cells = <0>;
138 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
139 <0x506c0000 0x400>;
152 reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
153 <0x506c8000 0x400>;
166 reg = <0x54006000 0x100>;
[all …]
Duniphier-pxs2.dtsi19 #size-cells = <0>;
21 cpu0: cpu@0 {
24 reg = <0>;
112 #clock-cells = <0>;
117 #clock-cells = <0>;
163 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
164 <0x506c0000 0x400>;
179 reg = <0x54006000 0x100>;
181 #size-cells = <0>;
184 pinctrl-0 = <&pinctrl_spi0>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsar2130p.dtsi33 #clock-cells = <0>;
39 #clock-cells = <0>;
46 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0x0 0x0>;
52 clocks = <&cpufreq_hw 0>;
55 qcom,freq-domain = <&cpufreq_hw 0>;
77 reg = <0x0 0x100>;
78 clocks = <&cpufreq_hw 0>;
81 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsa8775p.dtsi30 #clock-cells = <0>;
35 #clock-cells = <0>;
41 #size-cells = <0>;
43 cpu0: cpu@0 {
46 reg = <0x0 0x0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
70 reg = <0x0 0x100>;
74 qcom,freq-domain = <&cpufreq_hw 0>;
89 reg = <0x0 0x200>;
93 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsc8180x.dtsi29 #clock-cells = <0>;
35 #clock-cells = <0>;
43 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0 0x0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
59 clocks = <&cpufreq_hw 0>;
77 reg = <0x0 0x100>;
81 qcom,freq-domain = <&cpufreq_hw 0>;
88 clocks = <&cpufreq_hw 0>;
[all …]
Dsm8350.dtsi38 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0 0x0>;
58 clocks = <&cpufreq_hw 0>;
61 qcom,freq-domain = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
82 clocks = <&cpufreq_hw 0>;
85 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsm8150.dtsi34 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0x0 0x0>;
55 clocks = <&cpufreq_hw 0>;
60 qcom,freq-domain = <&cpufreq_hw 0>;
62 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
83 reg = <0x0 0x100>;
84 clocks = <&cpufreq_hw 0>;
[all …]
Dsm8550.dtsi39 #clock-cells = <0>;
44 #clock-cells = <0>;
48 #clock-cells = <0>;
56 #clock-cells = <0>;
66 #size-cells = <0>;
68 cpu0: cpu@0 {
71 reg = <0 0>;
72 clocks = <&cpufreq_hw 0>;
77 qcom,freq-domain = <&cpufreq_hw 0>;
97 reg = <0 0x100>;
[all …]
Dsm8450.dtsi39 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0 0x0>;
62 qcom,freq-domain = <&cpufreq_hw 0>;
64 clocks = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
88 clocks = <&cpufreq_hw 0>;
[all …]
Dsm8650.dtsi40 #clock-cells = <0>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
59 #clock-cells = <0>;
69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0 0>;
76 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
107 reg = <0 0x100>;
[all …]
Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 cpu0: cpu@0 {
99 reg = <0x0 0x0>;
100 clocks = <&cpufreq_hw 0>;
107 qcom,freq-domain = <&cpufreq_hw 0>;
109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
115 cache-size = <0x20000>;
121 cache-size = <0x400000>;
[all …]