| #
1ff15c59 |
| 26-Aug-2020 |
jinyue110 <[email protected]> |
BPU: fix bug BPU and icache is not synchronous
BPU doesn't know icahce miss and will not stall pipeline
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| #
c740211c |
| 21-Aug-2020 |
jinyue110 <[email protected]> |
icache: connect resp_ready to if4_ready
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| #
6e60446c |
| 21-Aug-2020 |
jinyue110 <[email protected]> |
icache: fix bug that flush req still enter s3
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| #
395c0ea6 |
| 18-Aug-2020 |
jinyue110 <[email protected]> |
Icache: fix syntax error
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| #
8d67edcb |
| 18-Aug-2020 |
jinyue110 <[email protected]> |
IFU: change into IcacheResp and IcacheReq
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| #
4a5c1190 |
| 18-Aug-2020 |
GouLingrui <[email protected]> |
IFU: only count branch into global history
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| #
b42da250 |
| 14-Aug-2020 |
GouLingrui <[email protected]> |
Merge remote-tracking branch 'origin/dev-frontend-tage' into dev-frontend
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| #
26361f66 |
| 13-Aug-2020 |
jinyue110 <[email protected]> |
BPU: add BPU object and apply function
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| #
3140b1e2 |
| 12-Aug-2020 |
Lingrui98 <[email protected]> |
IFU: only when redirect should we roll back histptr, TAGE: fix updateBank
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| #
97feea0e |
| 07-Aug-2020 |
GouLingrui <[email protected]> |
BPU: use outOfOrder updateInfo to update btb/ubtb/bim
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| #
c8cc6402 |
| 06-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu: add c.j target-gen logic
predecode: fix bug in isCall and isRet
micorbench and coremark pass!
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| #
e9199ec7 |
| 06-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu/bpu: fix bug in saveHalfRVI
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| #
e87da745 |
| 05-Aug-2020 |
zhanglinjuan <[email protected]> |
decoder: add rvc call/ret
bpu: fix lastHit in stage3
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| #
8ded239c |
| 05-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu: save half RVI only in IF4
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| #
c4809707 |
| 04-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu: redirect when jal target differs from bpu
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| #
a1d6ade0 |
| 04-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu/bpu: calculate jal target directly
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| #
160e49bb |
| 03-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu: take snpc when if4_pc redirects but not taken
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| #
595a888a |
| 03-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu: if2/if3_valid should bt false when outfire
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| #
b0caf0d6 |
| 03-Aug-2020 |
Lingrui98 <[email protected]> |
IFU: fetchPacket should be set invalid when fire and no new data is coming, IBuffer: only flip the valid bit when valid while dequeuing
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| #
32eca53b |
| 03-Aug-2020 |
Lingrui98 <[email protected]> |
IFU, BPU: pass update info in
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| #
d92c92cd |
| 02-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu/icache: enable ready in each stage when flush
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| #
5d0db748 |
| 02-Aug-2020 |
Lingrui98 <[email protected]> |
BPU, IFU: add bpu debug info, ifu icacheResp ready: if3_ready
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| #
ead4f1de |
| 02-Aug-2020 |
Lingrui98 <[email protected]> |
Merge remote-tracking branch 'origin/dev-frontend' into bpu_debug
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| #
a0a7b9dc |
| 02-Aug-2020 |
Lingrui98 <[email protected]> |
BPU, IFU: Can pass the compilation
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| #
bddf2820 |
| 01-Aug-2020 |
zhanglinjuan <[email protected]> |
ifu: fetch packets after 500 cycles
|