History log of /XiangShan/src/main/scala/xiangshan/frontend/BPU.scala (Results 251 – 275 of 339)
Revision Date Author Comments
# 608ba82c 31-Jul-2020 zhanglinjuan <[email protected]>

backend: adaptive backend interface with frontend


# 58c523f4 31-Jul-2020 Lingrui98 <[email protected]>

BPU: fix grammatic errors


# dd05de20 31-Jul-2020 Lingrui98 <[email protected]>

BPU: finish bim


# 39ea0b38 31-Jul-2020 Lingrui98 <[email protected]>

Merge remote-tracking branch 'origin/dev-frontend-tage' into dev-frontend


# 77b94f47 31-Jul-2020 Lingrui98 <[email protected]>

BPU: finish tage


# 87e3f53a 31-Jul-2020 zhanglinjuan <[email protected]>

bpu/ifu: import history of in-order-update branch
ibuffer: brInfo is wrapped in brUpdateInfo!


# 69cafcc9 31-Jul-2020 Lingrui98 <[email protected]>

BPU: btb finished


# 530c435e 31-Jul-2020 Lingrui98 <[email protected]>

Merge remote-tracking branch 'origin/dev-frontend' into dev-frontend-btb


# 280a374d 31-Jul-2020 zhanglinjuan <[email protected]>

Merge branch 'dev-frontend-ifu' into dev-frontend


# c32460fb 30-Jul-2020 Lingrui98 <[email protected]>

BPU: halfdone refactoring BTB


# e3aeae54 30-Jul-2020 Lingrui98 <[email protected]>

BPU: finish bpu


# ee286e3b 30-Jul-2020 zhanglinjuan <[email protected]>

ifu: add previous half instruction logic in if2


# 53bf6077 29-Jul-2020 Lingrui98 <[email protected]>

BPU: halfdone refactoring


# 4b4e15d6 29-Jul-2020 Lingrui98 <[email protected]>

BPU: Add tage into stageIO


# 80d2974b 29-Jul-2020 Lingrui98 <[email protected]>

BPU: Initiate refactoring


# f226232f 29-Jul-2020 zhanglinjuan <[email protected]>

Merge branch 'refactor-redirect' into dev-frontend


# 66b0d0c3 29-Jul-2020 zhanglinjuan <[email protected]>

bpu/bundle: re-define bpu interface


# b2e6921e 28-Jul-2020 LinJiawei <[email protected]>

Refactor redirect, cputest pass, microbench fail


# fd14e3c8 28-Jul-2020 zhanglinjuan <[email protected]>

Merge branch 'master' into dev-bpu-rvc


# 61118286 27-Jul-2020 zhanglinjuan <[email protected]>

frontend: use Predecoder instead of decoder


# 77de6f52 22-Jul-2020 zhanglinjuan <[email protected]>

frontend/multiplier: fix pipeline bugs and mul flush logic

1. bpu: fix instrValid in stage3
2. multiplier: flush validVec according to the previous flushVec


# f18dcc7c 22-Jul-2020 GouLingrui <[email protected]>

MUL: fix flush logic
BPU: fix s3 instrValid and s1 valid


# e1d867a0 22-Jul-2020 GouLingrui <[email protected]>

BPU, IFU, Ibuffer, EXU: fix instrvalid bug in BPU s1, fix bugs related to inst offset


# 12837dd3 22-Jul-2020 zhanglinjuan <[email protected]>

bpu: fix bug in instrValid of RVI instruction


# 22d877d3 22-Jul-2020 zhanglinjuan <[email protected]>

frontend: add logs


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