1 /*
2 * Copyright (c) 2014 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include <arch/mp.h>
24
25 #include <assert.h>
26 #include <trace.h>
27 #include <err.h>
28 #include <platform/interrupts.h>
29 #include <arch/ops.h>
30
31 #if WITH_DEV_INTERRUPT_ARM_GIC
32 #include <dev/interrupt/arm_gic.h>
33 #elif PLATFORM_BCM28XX
34 /* bcm28xx has a weird custom interrupt controller for MP */
35 extern void bcm28xx_send_ipi(uint irq, uint cpu_mask);
36 #else
37 #error need other implementation of interrupt controller that can ipi
38 #endif
39
40 #define LOCAL_TRACE 0
41
42 #define GIC_IPI_BASE (14)
43
arch_mp_send_ipi(mp_cpu_mask_t target,mp_ipi_t ipi)44 status_t arch_mp_send_ipi(mp_cpu_mask_t target, mp_ipi_t ipi)
45 {
46 LTRACEF("target 0x%x, ipi %u\n", target, ipi);
47
48 #if WITH_DEV_INTERRUPT_ARM_GIC
49 uint gic_ipi_num = ipi + GIC_IPI_BASE;
50
51 /* filter out targets outside of the range of cpus we care about */
52 target &= ((1UL << SMP_MAX_CPUS) - 1);
53 if (target != 0) {
54 LTRACEF("target 0x%x, gic_ipi %u\n", target, gic_ipi_num);
55 arm_gic_sgi(gic_ipi_num, ARM_GIC_SGI_FLAG_NS, target);
56 }
57 #elif PLATFORM_BCM28XX
58 /* filter out targets outside of the range of cpus we care about */
59 target &= ((1UL << SMP_MAX_CPUS) - 1);
60 if (target != 0) {
61 bcm28xx_send_ipi(ipi, target);
62 }
63 #endif
64
65 return NO_ERROR;
66 }
67
arm_ipi_generic_handler(void * arg)68 enum handler_return arm_ipi_generic_handler(void *arg)
69 {
70 LTRACEF("cpu %u, arg %p\n", arch_curr_cpu_num(), arg);
71
72 return INT_NO_RESCHEDULE;
73 }
74
arm_ipi_reschedule_handler(void * arg)75 enum handler_return arm_ipi_reschedule_handler(void *arg)
76 {
77 LTRACEF("cpu %u, arg %p\n", arch_curr_cpu_num(), arg);
78
79 return mp_mbx_reschedule_irq();
80 }
81
arch_mp_init_percpu(void)82 void arch_mp_init_percpu(void)
83 {
84 register_int_handler(MP_IPI_GENERIC + GIC_IPI_BASE, &arm_ipi_generic_handler, 0);
85 register_int_handler(MP_IPI_RESCHEDULE + GIC_IPI_BASE, &arm_ipi_reschedule_handler, 0);
86
87 //unmask_interrupt(MP_IPI_GENERIC);
88 //unmask_interrupt(MP_IPI_RESCHEDULE);
89 }
90
91