1a58e3351SLi Qianruo/*************************************************************************************** 2a58e3351SLi Qianruo * Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3a58e3351SLi Qianruo * Copyright (c) 2020-2021 Peng Cheng Laboratory 4a58e3351SLi Qianruo * 5a58e3351SLi Qianruo * XiangShan is licensed under Mulan PSL v2. 6a58e3351SLi Qianruo * You can use this software according to the terms and conditions of the Mulan PSL v2. 7a58e3351SLi Qianruo * You may obtain a copy of Mulan PSL v2 at: 8a58e3351SLi Qianruo * http://license.coscl.org.cn/MulanPSL2 9a58e3351SLi Qianruo * 10a58e3351SLi Qianruo * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, 11a58e3351SLi Qianruo * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 12a58e3351SLi Qianruo * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. 13a58e3351SLi Qianruo * 14a58e3351SLi Qianruo * See the Mulan PSL v2 for more details. 15a58e3351SLi Qianruo ***************************************************************************************/ 16a58e3351SLi Qianruo 17a58e3351SLi Qianruopackage futest 18a58e3351SLi Qianruo 19a58e3351SLi Qianruoimport chisel3._ 20a58e3351SLi Qianruoimport chiseltest._ 21a58e3351SLi Qianruoimport chiseltest.ChiselScalatestTester 2251981c77SbugGeneratorimport chiseltest.VerilatorBackendAnnotation 2351981c77SbugGeneratorimport chiseltest.simulator.VerilatorFlags 24a58e3351SLi Qianruoimport org.scalatest.flatspec.AnyFlatSpec 25a58e3351SLi Qianruoimport org.scalatest.matchers.must.Matchers 2651e45dbbSTang Haojinimport xiangshan.test.types._ 27*5931ace3STang Haojinimport xiangshan.transforms.PrintModuleName 28a58e3351SLi Qianruo 29a58e3351SLi Qianruoimport xiangshan.backend.fu._ 30a58e3351SLi Qianruo 31a58e3351SLi Qianruoimport scala.util.Random 32a58e3351SLi Qianruo 33a58e3351SLi Qianruo 34a58e3351SLi Qianruoclass SRT4DividerWrapper extends Module { 35a58e3351SLi Qianruo val io = IO(new Bundle{ 36a58e3351SLi Qianruo val dividend = Input(UInt(64.W)) 37a58e3351SLi Qianruo val divisor = Input(UInt(64.W)) 38a58e3351SLi Qianruo val sign = Input(Bool()) 39a58e3351SLi Qianruo val isHi = Input(Bool()) 40a58e3351SLi Qianruo val isW = Input(Bool()) 41a58e3351SLi Qianruo val in_valid = Input(Bool()) 42a58e3351SLi Qianruo val out_ready = Input(Bool()) 43a58e3351SLi Qianruo val in_ready = Output(Bool()) 44a58e3351SLi Qianruo val out_valid = Output(Bool()) 45a58e3351SLi Qianruo val result = Output(UInt(64.W)) 46a58e3351SLi Qianruo }) 47a58e3351SLi Qianruo val divider = Module(new SRT16DividerDataModule(len = 64)) 48a58e3351SLi Qianruo divider.io.src(0) := io.dividend 49a58e3351SLi Qianruo divider.io.src(1) := io.divisor 50a58e3351SLi Qianruo divider.io.kill_r := false.B 51a58e3351SLi Qianruo divider.io.kill_w := false.B 52a58e3351SLi Qianruo divider.io.sign := io.sign 53a58e3351SLi Qianruo divider.io.isHi := io.isHi 54a58e3351SLi Qianruo divider.io.isW := io.isW 55a58e3351SLi Qianruo divider.io.out_ready := io.out_ready 56a58e3351SLi Qianruo divider.io.valid := io.in_valid 57a58e3351SLi Qianruo 58a58e3351SLi Qianruo io.in_ready := divider.io.in_ready 59a58e3351SLi Qianruo io.out_valid := divider.io.out_valid 60a58e3351SLi Qianruo 61a58e3351SLi Qianruo io.result := divider.io.out_data 62a58e3351SLi Qianruo 63a58e3351SLi Qianruo} 64a58e3351SLi Qianruo 65a58e3351SLi Qianruoclass IntDividerTest extends AnyFlatSpec with ChiselScalatestTester with Matchers { 66a58e3351SLi Qianruo behavior of "srt16 divider" 67a58e3351SLi Qianruo it should "run" in { 68a58e3351SLi Qianruo val rand = new Random(0x14226) 69a58e3351SLi Qianruo val testNum = 1000 7051981c77SbugGenerator 7151e45dbbSTang Haojin val printModuleNameAnno = chisel3.BuildInfo.version match { 7251e45dbbSTang Haojin case "3.6.0" => Seq(RunFirrtlTransformAnnotation(new PrintModuleName)) 7351e45dbbSTang Haojin case _ => Seq() 7451e45dbbSTang Haojin } 7551e45dbbSTang Haojin 76a58e3351SLi Qianruo test(new SRT4DividerWrapper).withAnnotations(Seq(VerilatorBackendAnnotation, 7751981c77SbugGenerator // LineCoverageAnnotation, 7851981c77SbugGenerator // ToggleCoverageAnnotation, 7951981c77SbugGenerator VerilatorFlags(Seq( 8051981c77SbugGenerator // "--output-split 20", "--output-split-cfuncs 20", 81a58e3351SLi Qianruo "+define+RANDOMIZE_REG_INIT", "+define+RANDOMIZE_MEM_INIT", "--trace")), 8251e45dbbSTang Haojin ) ++ printModuleNameAnno){ m => 83a58e3351SLi Qianruo println("Test started!") 84a58e3351SLi Qianruo m.clock.step(20) 85a58e3351SLi Qianruo 86a58e3351SLi Qianruo for (i <- 1 to testNum) { 87a58e3351SLi Qianruo m.clock.step(3) 88a58e3351SLi Qianruo m.io.in_ready.expect(true.B) 89a58e3351SLi Qianruo val divisor = rand.nextLong() 90a58e3351SLi Qianruo val dividend = rand.nextLong() 91a58e3351SLi Qianruo // val sign = rand.nextBoolean() 92a58e3351SLi Qianruo 93a58e3351SLi Qianruo // val isSigned = if (sign) s"Signed division" else s"Unsigned division" 94a58e3351SLi Qianruo println(s"$i th iteration\n" + s"divisor is ${divisor.toHexString}, dividend is ${dividend.toHexString}") 95a58e3351SLi Qianruo m.io.in_valid.poke(true.B) 96a58e3351SLi Qianruo m.io.dividend.poke((s"b" + dividend.toBinaryString).asUInt(64.W)) 97a58e3351SLi Qianruo m.io.divisor.poke((s"b" + divisor.toBinaryString).asUInt(64.W)) 98a58e3351SLi Qianruo m.io.sign.poke(true.B) 99a58e3351SLi Qianruo val (quotient, remainder) = (dividend / divisor, dividend % divisor) 100a58e3351SLi Qianruo println(s"quotient is ${quotient.toHexString}, remainder is ${remainder.toHexString}") 101a58e3351SLi Qianruo var timeTaken = 0 102a58e3351SLi Qianruo while (m.io.out_valid.peek().litToBoolean != true) { 103a58e3351SLi Qianruo m.clock.step() 104a58e3351SLi Qianruo timeTaken += 1 105a58e3351SLi Qianruo if (timeTaken >= 62) assert(false, s"Timeout for single execution!!!") 106a58e3351SLi Qianruo } 107a58e3351SLi Qianruo 108a58e3351SLi Qianruo m.io.in_valid.poke(false.B) 109a58e3351SLi Qianruo m.io.out_ready.poke(true.B) 110a58e3351SLi Qianruo m.io.isHi.poke(false.B) 111a58e3351SLi Qianruo m.clock.step() 112a58e3351SLi Qianruo 113a58e3351SLi Qianruo m.io.result.expect((s"b" + quotient.toBinaryString).asUInt(64.W)) 114a58e3351SLi Qianruo m.io.isHi.poke(true.B) 115a58e3351SLi Qianruo m.clock.step() 116a58e3351SLi Qianruo 117a58e3351SLi Qianruo m.io.result.expect((s"b" + remainder.toBinaryString).asUInt(64.W)) 118a58e3351SLi Qianruo } 119a58e3351SLi Qianruo } 120a58e3351SLi Qianruo } 121a58e3351SLi Qianruo}