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/btstack/port/samv71-xplained-atwilc3000/ASF/sam/drivers/matrix/
H A Dmatrix.c4 * \brief Matrix driver for SAM.
47 #include "matrix.h"
58 * \defgroup sam_drivers_matrix_group Matrix (MATRIX)
62 * The Bus Matrix implements a multi-layer AHB that enables parallel access
71 #define MATRIX MATRIX0 macro
73 #define MATRIX MATRIX1
79 #define MATRIX MATRIX0 macro
81 #define MATRIX MATRIX1
87 #define MATRIX MATRIX0 macro
89 #define MATRIX MATRIX1
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H A Dmatrix.h4 * \brief Matrix driver for SAM.
63 /** \brief Matrix master: undefined length burst type */
77 /** \brief Matrix slave: default master type */
86 /** \brief Matrix slave: arbitration type */
/btstack/port/samv71-xplained-atwilc3000/ASF/sam/utils/cmsis/samv71/include/instance/
H A Dmatrix.h48 /* ========== Register definition for MATRIX peripheral ========== */
50 …#define REG_MATRIX_MCFG (0x40088000U) /**< \brief (MATRIX) Master Configuration …
51 …#define REG_MATRIX_SCFG (0x40088040U) /**< \brief (MATRIX) Slave Configuration R…
52 …#define REG_MATRIX_PRAS0 (0x40088080U) /**< \brief (MATRIX) Priority Register A f…
53 …#define REG_MATRIX_PRBS0 (0x40088084U) /**< \brief (MATRIX) Priority Register B f…
54 …#define REG_MATRIX_PRAS1 (0x40088088U) /**< \brief (MATRIX) Priority Register A f…
55 …#define REG_MATRIX_PRBS1 (0x4008808CU) /**< \brief (MATRIX) Priority Register B f…
56 …#define REG_MATRIX_PRAS2 (0x40088090U) /**< \brief (MATRIX) Priority Register A f…
57 …#define REG_MATRIX_PRBS2 (0x40088094U) /**< \brief (MATRIX) Priority Register B f…
58 …#define REG_MATRIX_PRAS3 (0x40088098U) /**< \brief (MATRIX) Priority Register A f…
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/btstack/port/samv71-xplained-atwilc3000/ASF/sam/utils/cmsis/samv71/include/component/
H A Dmatrix.h49 /** SOFTWARE API DEFINITION FOR AHB Bus Matrix */
51 /** \addtogroup SAMV71_MATRIX AHB Bus Matrix */
60 /** \brief Matrix hardware registers */
63 …__IO uint32_t MATRIX_MCFG[12]; /**< \brief (Matrix Offset: 0x0000) Master Configuration…
65 …__IO uint32_t MATRIX_SCFG[9]; /**< \brief (Matrix Offset: 0x0040) Slave Configuration …
67 MatrixPr MATRIX_PR[MATRIXPR_NUMBER]; /**< \brief (Matrix Offset: 0x0080) 0 .. 8 */
69 …__IO uint32_t MATRIX_MRCR; /**< \brief (Matrix Offset: 0x0100) Master Remap Control…
71 …__IO uint32_t CCFG_CAN0; /**< \brief (Matrix Offset: 0x0110) CAN0 Configuration R…
72 …__IO uint32_t CCFG_SYSIO; /**< \brief (Matrix Offset: 0x0114) System I/O and CAN1 …
74 …__IO uint32_t CCFG_SMCNFCS; /**< \brief (Matrix Offset: 0x0124) SMC NAND Flash Chip …
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H A Disi.h147 … << ISI_Y2R_SET0_C0_Pos) /**< \brief (ISI_Y2R_SET0) Color Space Conversion Matrix Coefficient C0 */
150 … << ISI_Y2R_SET0_C1_Pos) /**< \brief (ISI_Y2R_SET0) Color Space Conversion Matrix Coefficient C1 */
153 … << ISI_Y2R_SET0_C2_Pos) /**< \brief (ISI_Y2R_SET0) Color Space Conversion Matrix Coefficient C2 */
156 … << ISI_Y2R_SET0_C3_Pos) /**< \brief (ISI_Y2R_SET0) Color Space Conversion Matrix Coefficient C3 */
160 … << ISI_Y2R_SET1_C4_Pos) /**< \brief (ISI_Y2R_SET1) Color Space Conversion Matrix Coefficient C4 */
167 … << ISI_R2Y_SET0_C0_Pos) /**< \brief (ISI_R2Y_SET0) Color Space Conversion Matrix Coefficient C0 */
170 … << ISI_R2Y_SET0_C1_Pos) /**< \brief (ISI_R2Y_SET0) Color Space Conversion Matrix Coefficient C1 */
173 … << ISI_R2Y_SET0_C2_Pos) /**< \brief (ISI_R2Y_SET0) Color Space Conversion Matrix Coefficient C2 */
178 … << ISI_R2Y_SET1_C3_Pos) /**< \brief (ISI_R2Y_SET1) Color Space Conversion Matrix Coefficient C3 */
181 … << ISI_R2Y_SET1_C4_Pos) /**< \brief (ISI_R2Y_SET1) Color Space Conversion Matrix Coefficient C4 */
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/btstack/port/samv71-xplained-atwilc3000/ASF/thirdparty/CMSIS/Include/
H A Darm_math.h55 * - Matrix functions
186 * @defgroup groupMatrix Matrix Functions
188 * This set of functions provides basic matrix math operations.
189 * The functions operate on matrix data structures. For example,
191 * definition for the floating-point matrix structure is shown
196 * uint16_t numRows; // number of rows of the matrix.
197 * uint16_t numCols; // number of columns of the matrix.
198 * float32_t *pData; // points to the data of the matrix.
203 * The structure specifies the size of the matrix and then points to
206 * matrix element (i, j) is stored at:
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/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Include/
H A Darm_math.h55 * - Matrix functions
193 * @defgroup groupMatrix Matrix Functions
195 * This set of functions provides basic matrix math operations.
196 * The functions operate on matrix data structures. For example,
198 * definition for the floating-point matrix structure is shown
203 * uint16_t numRows; // number of rows of the matrix.
204 * uint16_t numCols; // number of columns of the matrix.
205 * float32_t *pData; // points to the data of the matrix.
210 * The structure specifies the size of the matrix and then points to
213 * matrix element (i, j) is stored at:
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/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/bsp/cmsis/Include/
H A Darm_math.h43 * - Matrix functions
198 * @defgroup groupMatrix Matrix Functions
200 * This set of functions provides basic matrix math operations.
201 * The functions operate on matrix data structures. For example,
203 * definition for the floating-point matrix structure is shown
208 * uint16_t numRows; // number of rows of the matrix.
209 * uint16_t numCols; // number of columns of the matrix.
210 * float32_t *pData; // points to the data of the matrix.
215 * The structure specifies the size of the matrix and then points to
218 * matrix element (i, j) is stored at:
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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/NN/Include/
H A Darm_nnfunctions.h115 * a column. After im2col, the convolution is computed as matrix-matrix
638 * Fully-connected layer is basically a matrix-vector multiplication
639 * with bias. The matrix is the weights and the input/output vectors
652 * @param[in] pM pointer to matrix weights
654 * @param[in] num_of_rows number of rows in weight matrix
677 * @param[in] pM pointer to matrix weights
679 * @param[in] num_of_rows number of rows in weight matrix
702 * @param[in] pM pointer to matrix weights
704 * @param[in] num_of_rows number of rows in weight matrix
727 * @param[in] pM pointer to matrix weights
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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/
H A Dref_functions.h153 const q7_t * pM, // pointer to matrix
162 const q15_t * pM, // pointer to matrix
171 const q7_t * pM, // pointer to matrix
180 const q7_t * pM, // pointer to matrix
189 const q15_t * pM, // pointer to matrix
198 const q7_t * pM, // pointer to matrix
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/
H A Darm_fully_connected_q15_opt.c46 * @param[in] pM pointer to matrix weights
48 * @param[in] num_of_rows number of rows in weight matrix
64 * matrix. So if the original matrix looks like this:
86 * So the stored weight matrix looks like this:
H A Darm_fully_connected_q7_opt.c46 * @param[in] pM pointer to matrix weights
48 * @param[in] num_of_rows number of rows in weight matrix
63 * matrix. The vector input is assumed in q7_t format, we call
68 * matrix. So if the original q7_t matrix looks like this:
109 * So the stored weight matrix looks like this:
H A Darm_fully_connected_mat_q7_vec_q15_opt.c46 * @param[in] pM pointer to matrix weights
48 * @param[in] num_of_rows number of rows in weight matrix
69 * matrix. So if the original q7_t matrix looks like this:
98 * So the stored weight matrix looks like this:
H A Darm_fully_connected_q7.c46 * @param[in] pM pointer to matrix weights
48 * @param[in] num_of_rows number of rows in weight matrix
63 * matrix without interleaving.
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/NN/Source/ConvolutionFunctions/
H A Darm_nn_mat_mult_kernel_q7_q15.c22 * Description: Matrix-multiplication function for convolution
34 * @brief Matrix-multiplication function for convolution
47 * This function does the matrix multiplication with weight matrix
/btstack/port/samv71-xplained-atwilc3000/
H A Dasf.h74 // From module: MATRIX - Bus Matrix
75 #include <matrix.h>
/btstack/3rd-party/bluedroid/decoder/srce/
H A Dsynthesis-sbc.c34 and another, sparse matrix.
47 R turns out to be a sparse 16x8 matrix with the following non-zero
72 the matrix N in light of its factorization into C2 and R, R's
454 This routine implements the cosine modulation matrix for 4-subband
456 matrix, M4, can be factored into an 8-point Type II Discrete Cosine
457 Transform, DCTII_4 and a matrix S4, given here:
/btstack/port/samv71-xplained-atwilc3000/example/template/
H A Dconfig.mk66 sam/drivers/matrix/matrix.c \
95 sam/drivers/matrix \
/btstack/port/samv71-xplained-atwilc3000/ASF/sam/utils/cmsis/samv71/include/
H A Dsamv71n20.h331 #include "component/matrix.h"
390 #include "instance/matrix.h"
505 #define MATRIX (0x40088000U) /**< \brief (MATRIX) Base Address */ macro
554 #define MATRIX ((Matrix *)0x40088000U) /**< \brief (MATRIX) Base Address */ macro
598 #define AXIMX_ADDR (0xA0000000u) /**< AXI Bus Matrix base address */
H A Dsamv71j20.h332 #include "component/matrix.h"
391 #include "instance/matrix.h"
506 #define MATRIX (0x40088000U) /**< \brief (MATRIX) Base Address */ macro
555 #define MATRIX ((Matrix *)0x40088000U) /**< \brief (MATRIX) Base Address */ macro
599 #define AXIMX_ADDR (0xA0000000u) /**< AXI Bus Matrix base address */
H A Dsamv71n19.h334 #include "component/matrix.h"
394 #include "instance/matrix.h"
511 #define MATRIX (0x40088000U) /**< \brief (MATRIX) Base Address */ macro
561 #define MATRIX ((Matrix *)0x40088000U) /**< \brief (MATRIX) Base Address */ macro
605 #define AXIMX_ADDR (0xA0000000u) /**< AXI Bus Matrix base address */
H A Dsamv71n21.h331 #include "component/matrix.h"
390 #include "instance/matrix.h"
505 #define MATRIX (0x40088000U) /**< \brief (MATRIX) Base Address */ macro
554 #define MATRIX ((Matrix *)0x40088000U) /**< \brief (MATRIX) Base Address */ macro
598 #define AXIMX_ADDR (0xA0000000u) /**< AXI Bus Matrix base address */
H A Dsamv71j19.h329 #include "component/matrix.h"
387 #include "instance/matrix.h"
500 #define MATRIX (0x40088000U) /**< \brief (MATRIX) Base Address */ macro
548 #define MATRIX ((Matrix *)0x40088000U) /**< \brief (MATRIX) Base Address */ macro
592 #define AXIMX_ADDR (0xA0000000u) /**< AXI Bus Matrix base address */
H A Dsamv71j21.h332 #include "component/matrix.h"
391 #include "instance/matrix.h"
506 #define MATRIX (0x40088000U) /**< \brief (MATRIX) Base Address */ macro
555 #define MATRIX ((Matrix *)0x40088000U) /**< \brief (MATRIX) Base Address */ macro
599 #define AXIMX_ADDR (0xA0000000u) /**< AXI Bus Matrix base address */
H A Dsamv71q19.h352 #include "component/matrix.h"
418 #include "instance/matrix.h"
551 #define MATRIX (0x40088000U) /**< \brief (MATRIX) Base Address */ macro
607 #define MATRIX ((Matrix *)0x40088000U) /**< \brief (MATRIX) Base Address */ macro
653 #define AXIMX_ADDR (0xA0000000u) /**< AXI Bus Matrix base address */

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