Home
last modified time | relevance | path

Searched +full:master +full:- +full:mode (Results 1 – 25 of 1030) sorted by relevance

12345678910>>...42

/linux-6.14.4/drivers/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
36 # MASTER side ... talking to discrete SPI slave chips including microcontrollers
40 # bool "SPI Master Support"
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
58 comment "SPI Master Controller Drivers"
66 This enables support for SPI-NAND mode on the Airoha NAND
68 is implemented as a SPI-MEM controller.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <[email protected]>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
18 DMA controller to use, but the channels themselves are hard-wired. The
22 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
23 "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
24 "fsl,mpc8610-dma-channel") can remain. If these nodes are left as
[all …]
/linux-6.14.4/Documentation/networking/
Dipvlan.rst1 .. SPDX-License-Identifier: GPL-2.0
13 exception of using L3 for mux-ing /demux-ing among slaves. This property makes
14 the master device share the L2 with its slave devices. I have developed this
34 ip link add link <master> name <slave> type ipvlan [ mode MODE ] [ FLAGS ]
36 MODE: l3 (default) | l3s | l2
41 (a) Following will create IPvlan link with eth0 as master in
42 L3 bridge mode::
45 (b) This command will create IPvlan link in L2 bridge mode::
47 bash# ip link add link eth0 name ipvl0 type ipvlan mode l2 bridge
49 (c) This command will create an IPvlan device in L2 private mode::
[all …]
Dvrf.rst1 .. SPDX-License-Identifier: GPL-2.0
11 routing and forwarding domains (aka VRFs, VRF-lite to be specific) in the
12 Linux network stack. One use case is the multi-tenancy problem where each
30 ------
34 +-----------------------------+
35 | vrf-blue | ===> route table 10
36 +-----------------------------+
38 +------+ +------+ +-------------+
40 +------+ +------+ +-------------+
42 +------+ +------+
[all …]
/linux-6.14.4/drivers/i3c/
Dmaster.c1 // SPDX-License-Identifier: GPL-2.0
29 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
34 * - enabling/disabling slave events
35 * - re-triggering DAA
36 * - changing the dynamic address of a device
37 * - relinquishing mastership
38 * - ...
46 down_write(&bus->lock); in i3c_bus_maintenance_lock()
50 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
60 up_write(&bus->lock); in i3c_bus_maintenance_unlock()
[all …]
/linux-6.14.4/drivers/media/dvb-frontends/drx39xyj/
Ddrx_dap_fasi.h2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
48 /*-------- compilation control switches --------------------------------------*/
53 /*-------- Required includes -------------------------------------------------*/
57 /*-------- Defines, configuring the API --------------------------------------*/
98 #error At least one of short- or long-addressing format must be allowed.
103 * Single/master multi master setting
106 * Comments about SINGLE MASTER/MULTI MASTER modes:
108 * Consider the two sides:1) the master and 2)the slave.
110 * Master:
112 * + single master mode means no use of repeated starts
[all …]
/linux-6.14.4/Documentation/networking/device_drivers/ethernet/ti/
Dcpsw_switchdev.rst1 .. SPDX-License-Identifier: GPL-2.0
17 ip -d link show dev sw0p1 | grep switchid
23 Dual mac mode
26 - The new (cpsw_new.c) driver is operating in dual-emac mode by default, thus
30 - optimized promiscuous mode: The P0_UNI_FLOOD (both ports) is enabled in
32 So, Ports in promiscuous mode will keep possibility of mcast and vlan
34 to the same bridge, but without enabling "switch" mode, or to different
36 - learning disabled on ports as it make not too much sense for
37 segregated ports - no forwarding in HW.
38 - enabled basic support for devlink.
[all …]
Dam65_nuss_cpsw_switchdev.rst1 .. SPDX-License-Identifier: GPL-2.0
14 ip -d link show dev sw0p1 | grep switchid
20 Multi mac mode
23 - The driver is operating in multi-mac mode by default, thus
29 See Documentation/networking/devlink/am65-nuss-cpsw-switch.rst
34 The Switch mode can be enabled by configuring devlink driver parameter
40 This can be done regardless of the state of Port's netdev devices - UP/DOWN, but
45 When the both interfaces joined the bridge - CPSW switch driver will enable
62 ip link set dev sw0p1 master br0
63 ip link set dev sw0p2 master br0
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/ata/
Dcortina,gemini-sata-bridge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/cortina,gemini-sata-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <[email protected]>
13 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
19 const: cortina,gemini-sata-bridge
28 reset-names:
30 - const: sata0
31 - const: sata1
[all …]
/linux-6.14.4/include/linux/i3c/
Dmaster.h1 /* SPDX-License-Identifier: GPL-2.0 */
39 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
42 * @master: I3C master that instantiated this device. Will be used to do
44 * @master_priv: master private data assigned to the device. Can be used to
45 * add master specific information
51 struct i3c_master_controller *master; member
62 * struct i2c_dev_boardinfo - I2C device board information
68 * This structure is used to attach board-level information to an I2C device.
78 * struct i2c_dev_desc - I2C device descriptor
87 * using &struct_i3c_master_controller->ops->attach_i2c_dev().
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/net/
Dti,dp83822.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <[email protected]>
14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16 data over standard, twisted-pair cables or to connect to an external,
17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
24 - $ref: ethernet-phy.yaml#
30 ti,link-loss-low:
33 DP83822 PHY in Fiber mode only.
[all …]
/linux-6.14.4/drivers/i3c/master/mipi-i3c-hci/
Dext_caps.c1 // SPDX-License-Identifier: BSD-3-Clause
11 #include <linux/i3c/master.h>
26 hci->vendor_mipi_id = readl(base + 0x04); in hci_extcap_hardware_id()
27 hci->vendor_version_id = readl(base + 0x08); in hci_extcap_hardware_id()
28 hci->vendor_product_id = readl(base + 0x0c); in hci_extcap_hardware_id()
30 dev_info(&hci->master.dev, "vendor MIPI ID: %#x\n", hci->vendor_mipi_id); in hci_extcap_hardware_id()
31 dev_info(&hci->master.dev, "vendor version ID: %#x\n", hci->vendor_version_id); in hci_extcap_hardware_id()
32 dev_info(&hci->master.dev, "vendor product ID: %#x\n", hci->vendor_product_id); in hci_extcap_hardware_id()
35 switch (hci->vendor_mipi_id) { in hci_extcap_hardware_id()
37 hci->quirks |= HCI_QUIRK_RAW_CCC; in hci_extcap_hardware_id()
[all …]
Dxfer_mode_rate.h1 /* SPDX-License-Identifier: BSD-3-Clause */
7 * Transfer Mode/Rate Table definitions as found in extended capability
16 * Master Transfer Mode Table Fixed Indexes.
19 * obtained from the mode table in the extended capability area.
22 #define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
26 #define XFERMODE_IDX_I2C 0x08 /* Legacy I2C Mode */
29 * Transfer Mode Table Entry Bits Definitions
[all …]
/linux-6.14.4/drivers/i2c/busses/
Di2c-qcom-cci.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
3 // Copyright (c) 2017-2022 Linaro Limited.
98 u16 tsu_sto; /* set-up time for STOP condition */
99 u16 tsu_sta; /* set-up time for a repeated START condition */
112 u16 master; member
113 u8 mode; member
133 struct cci_master master[NUM_MASTERS]; member
142 val = readl(cci->base + CCI_IRQ_STATUS_0); in cci_isr()
143 writel(val, cci->base + CCI_IRQ_CLEAR_0); in cci_isr()
[all …]
/linux-6.14.4/tools/testing/selftests/bpf/prog_tests/
Dxdp_bonding.c1 // SPDX-License-Identifier: GPL-2.0
33 static int root_netns_fd = -1;
48 return -1; in setns_by_name()
63 return -1; in get_rx_packets()
85 return -1; in get_rx_packets()
106 return -1; in xdp_attach()
108 if (!ASSERT_LE(skeletons->nlinks+1, MAX_BPF_LINKS, "too many XDP programs attached")) in xdp_attach()
109 return -1; in xdp_attach()
113 return -1; in xdp_attach()
115 skeletons->links[skeletons->nlinks++] = link; in xdp_attach()
[all …]
/linux-6.14.4/drivers/ata/
Dpata_ftide010.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * struct ftide010 - state container for the Faraday FTIDE010
29 * @master_cbl: master cable type
32 * @master_to_sata0: Gemini SATA bridge: the ATA master is connected
36 * @master_to_sata1: Gemini SATA bridge: the ATA master is connected
48 /* Gemini-specific properties */
62 #define FTIDE010_UDMA_TIMING0 0x12 /* Master */
76 /* Set this bit for UDMA mode 5 and 6 */
98 * pio_active_time: array of 5 elements for T2 timing for Mode 0,
100 * pio_recovery_time: array of 5 elements for T2l timing for Mode 0,
[all …]
/linux-6.14.4/drivers/gpu/drm/arm/display/komeda/
Dkomeda_crtc.c1 // SPDX-License-Identifier: GPL-2.0
30 for_each_new_connector_in_state(crtc_st->state, conn, conn_st, i) { in komeda_crtc_get_color_config()
31 if (conn_st->crtc != crtc_st->crtc) in komeda_crtc_get_color_config()
34 conn_bpc = conn->display_info.bpc ? conn->display_info.bpc : 8; in komeda_crtc_get_color_config()
35 conn_color_formats &= conn->display_info.color_formats; in komeda_crtc_get_color_config()
53 if (!kcrtc_st->base.active) { in komeda_crtc_update_clock_ratio()
54 kcrtc_st->clock_ratio = 0; in komeda_crtc_update_clock_ratio()
58 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio()
61 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio()
65 * komeda_crtc_atomic_check - build display output data flow
[all …]
/linux-6.14.4/drivers/comedi/drivers/
Dplx9080.h1 /* SPDX-License-Identifier: GPL-2.0+ */
26 * struct plx_dma_desc - DMA descriptor format for PLX PCI 9080
32 * Describes the format of a scatter-gather DMA descriptor for the PLX
33 * PCI 9080. All members are raw, little-endian register values that
37 * The DMA descriptors must be aligned on a 16-byte boundary. Bits 3:0
80 /* Mode/Arbitration Register */
104 /* Local Bus Direct Slave Give Up Bus Mode */
108 /* PCI Request Mode */
110 /* PCI Specification v2.1 Mode */
112 /* PCI Read No Write Mode */
[all …]
/linux-6.14.4/drivers/media/v4l2-core/
Dv4l2-ctrls-priv.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2010-2021 Hans Verkuil <hverkuil-[email protected]>
12 if (!WARN_ON(!(vdev)) && ((vdev)->dev_debug & V4L2_DEV_DEBUG_CTRL)) \
17 #define has_op(master, op) \ argument
18 ((master)->ops && (master)->ops->op)
19 #define call_op(master, op) \ argument
20 (has_op(master, op) ? (master)->ops->op(master) : 0)
24 return list_entry(node, struct v4l2_ctrl_ref, node)->ctrl->id; in node2id()
29 * mode.
31 static inline bool is_cur_manual(const struct v4l2_ctrl *master) in is_cur_manual() argument
[all …]
/linux-6.14.4/include/linux/soundwire/
Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
37 /* SDW Master Device Number, not supported yet */
85 * enum sdw_slave_status - Slave status
103 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
104 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
114 * enum sdw_command_response - Command response as defined by SDW spec
142 /* block packing mode enum */
173 * enum sdw_port_data_mode: Data Port mode
175 * @SDW_PORT_DATA_MODE_NORMAL: Normal data mode where audio data is received
[all …]
/linux-6.14.4/tools/testing/selftests/drivers/net/bonding/
Dbond-eth-type-change.sh2 # SPDX-License-Identifier: GPL-2.0
20 ip -d l sh dev "$bonddev" | grep -q "MASTER"
21 check_err $? "MASTER flag is missing from the bond device"
23 ip -d l sh dev "$bonddev" | grep -q "SLAVE"
28 # this allows us to test both MASTER and SLAVE flags at once
32 local devbond0="test-bond0"
33 local devbond1="test-bond1"
34 local devbond2="test-bond2"
35 local nonethdev="test-noneth0"
37 # create a non-ARPHRD_ETHER device for testing (e.g. nlmon type)
[all …]
/linux-6.14.4/Documentation/w1/masters/
Domap-hdq.rst2 Kernel driver for omap HDQ/1-wire module
7 HDQ/1-wire controller on the TI OMAP 2430/3430 platforms.
15 The HDQ/1-Wire module of TI OMAP2430/3430 platforms implement the hardware
16 protocol of the master functions of the Benchmark HDQ and the Dallas
17 Semiconductor 1-Wire protocols. These protocols use a single wire for
18 communication between the master (HDQ/1-Wire controller) and the slave
19 (HDQ/1-Wire external compliant device).
21 A typical application of the HDQ/1-Wire module is the communication with battery
24 The controller supports operation in both HDQ and 1-wire mode. The essential
25 difference between the HDQ and 1-wire mode is how the slave device responds to
[all …]
/linux-6.14.4/sound/soc/mxs/
Dmxs-saif.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
13 #include <linux/clk-provider.h>
22 #include "mxs-saif.h"
32 * For MXS, two SAIF modules are instantiated on-chip.
33 * Each SAIF has a set of clock pins and can be operating in master
34 * mode simultaneously if they are connected to different off-chip codecs.
35 * Also, one of the two SAIFs can master or drive the clock pins while the
36 * other SAIF, in slave mode, receives clocking from the master SAIF.
39 * We abstract this as each saif has a master, the master could be
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/net/dsa/
Dlan9303.txt2 -------------------------------------------------
6 - compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
9 - "smsc,lan9303-mdio" for mdio managed mode
13 - reset-gpios: GPIO to be used to reset the whole device
14 - reset-duration: reset duration in milliseconds, defaults to 200 ms
23 auto-detected and mapped accordingly.
27 I2C managed mode:
29 master: masterdevice@X {
31 fixed-link { /* RMII fixed link to LAN9303 */
[all …]
/linux-6.14.4/fs/crypto/
Dkeysetup.c1 // SPDX-License-Identifier: GPL-2.0
18 .friendly_name = "AES-256-XTS",
26 .friendly_name = "AES-256-CBC-CTS",
33 .friendly_name = "AES-128-CBC-ESSIV",
41 .friendly_name = "AES-128-CBC-CTS",
48 .friendly_name = "SM4-XTS",
56 .friendly_name = "SM4-CBC-CTS",
71 .friendly_name = "AES-256-HCTR2",
87 if (S_ISREG(inode->i_mode)) in select_encryption_mode()
90 if (S_ISDIR(inode->i_mode) || S_ISLNK(inode->i_mode)) in select_encryption_mode()
[all …]

12345678910>>...42