Lines Matching +full:master +full:- +full:mode

1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11   - Andrew Davis <[email protected]>
14   The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16   data over standard, twisted-pair cables or to connect to an external,
17   fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
24   - $ref: ethernet-phy.yaml#
30   ti,link-loss-low:
33        DP83822 PHY in Fiber mode only.
36        This property is only applicable if the fiber mode support is strapped
39   ti,fiber-mode:
43        If present the DP83822 PHY is configured to operate in fiber mode
44        Fiber mode support can also be strapped. If the strap pin is not set
46        If the fiber mode is not strapped then signal detection for the PHY
48        In fiber mode, auto-negotiation is disabled and the PHY can only work in
49        100base-fx (full and half duplex) modes.
51   rx-internal-delay-ps:
54        Setting this property to a non-zero number sets the RX internal delay
58   tx-internal-delay-ps:
61        Setting this property to a non-zero number sets the TX internal delay
65   ti,cfg-dac-minus-one-bp:
69        of the logical level -1 for the MLT-3 encoded TX data.
74   ti,cfg-dac-plus-one-bp:
78        of the logical level +1 for the MLT-3 encoded TX data.
83   ti,rmii-mode:
85        If present, select the RMII operation mode. Two modes are
87          - RMII master, where the PHY outputs a 50MHz reference clock which can
89          - RMII slave, where the PHY expects a 50MHz reference clock input
91        The RMII operation mode can also be configured by its straps.
96       - master
97       - slave
99   ti,gpio2-clk-out:
105        - 'mac-if': In MII mode the clock frequency is 25-MHz, in RMII Mode the
106          clock frequency is 50-MHz and in RGMII Mode the clock frequency is
107          25-MHz.
108        - 'xi': XI clock(pass-through clock from XI pin).
109        - 'int-ref': Internal reference clock 25-MHz.
110        - 'rmii-master-mode-ref': RMII master mode reference clock 50-MHz. RMII
111          master mode reference clock is identical to MAC IF clock in RMII master
112          mode.
113        - 'free-running': Free running clock 125-MHz.
114        - 'recovered': Recovered clock is a 125-MHz recovered clock from a
118       - mac-if
119       - xi
120       - int-ref
121       - rmii-master-mode-ref
122       - free-running
123       - recovered
126   - reg
131   - |
133       #address-cells = <1>;
134       #size-cells = <0>;
135       ethphy0: ethernet-phy@0 {
137         rx-internal-delay-ps = <1>;
138         tx-internal-delay-ps = <1>;
139         ti,gpio2-clk-out = "xi";