Searched +full:adrst +full:- +full:n (Results 1 – 6 of 6) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/iio/adc/renesas,rzg2l-adc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Lad Prabhakar <prabhakar.mahadev-[email protected]>13 A/D Converter block is a successive approximation analog-to-digital converter14 with a 12-bit accuracy. Up to eight analog input channels can be selected.16 stored in a 32-bit data register corresponding to each channel.21 - items:22 - enum:[all …]
1 // SPDX-License-Identifier: GPL-2.07 * Author: Lad Prabhakar <prabhakar.mahadev-[email protected]>25 #define DRIVER_NAME "rzg2l-adc"27 #define RZG2L_ADM(n) ((n) * 0x4) argument52 #define RZG2L_ADCR(n) (0x30 + ((n) * 0x4)) argument59 * struct rzg2l_adc_hw_params - ADC hardware specific parameters95 * struct rzg2l_adc_channel - ADC channel descriptor118 return readl(adc->base + reg); in rzg2l_adc_readl()123 writel(val, adc->base + reg); in rzg2l_adc_writel()157 pr_err("%s stopping ADC timed out\n", __func__); in rzg2l_adc_start_stop()[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a08g045-cpg.h>10 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>14 #address-cells = <2>;15 #size-cells = <2>;17 audio_clk1: audio1-clk {18 compatible = "fixed-clock";19 #clock-cells = <0>;21 clock-frequency = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/clock/r9a07g043-cpg.h>12 #address-cells = <2>;13 #size-cells = <2>;15 audio_clk1: audio1-clk {16 compatible = "fixed-clock";17 #clock-cells = <0>;19 clock-frequency = <0>;22 audio_clk2: audio2-clk {23 compatible = "fixed-clock";[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g054-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;16 audio_clk1: audio1-clk {17 compatible = "fixed-clock";18 #clock-cells = <0>;20 clock-frequency = <0>;23 audio_clk2: audio2-clk {[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g044-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;16 audio_clk1: audio1-clk {17 compatible = "fixed-clock";18 #clock-cells = <0>;20 clock-frequency = <0>;23 audio_clk2: audio2-clk {[all …]