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Searched refs:SPI_I2SCFGR_PCMSYNC_Pos (Results 1 – 25 of 25) sorted by relevance

/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h5729 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
5730 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f410tx.h5679 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
5680 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f410cx.h5725 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
5726 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f401xe.h5760 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
5761 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f401xc.h5760 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
5761 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f411xe.h5791 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
5792 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f412cx.h10362 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
10363 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f405xx.h11245 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11246 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f415xx.h11530 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11531 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f412zx.h11372 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11373 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f407xx.h11581 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11582 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f412vx.h11352 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11353 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f413xx.h12013 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
12014 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f423xx.h12163 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
12164 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f412rx.h11339 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11340 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f417xx.h11863 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11864 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f446xx.h12753 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
12754 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f427xx.h12726 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
12727 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f437xx.h13028 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
13029 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f429xx.h13082 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
13083 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f439xx.h13376 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
13377 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f469xx.h16094 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
16095 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
H A Dstm32f479xx.h16391 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
16392 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/
H A Dstm32l073xx.h5552 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
5553 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h11597 #define SPI_I2SCFGR_PCMSYNC_Pos (7U) macro
11598 #define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */