/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
H A D | stm32f410rx.h | 5591 #define SPI_CR1_CPOL_Pos (1U) macro 5592 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f410tx.h | 5541 #define SPI_CR1_CPOL_Pos (1U) macro 5542 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f410cx.h | 5587 #define SPI_CR1_CPOL_Pos (1U) macro 5588 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f401xe.h | 5622 #define SPI_CR1_CPOL_Pos (1U) macro 5623 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f401xc.h | 5622 #define SPI_CR1_CPOL_Pos (1U) macro 5623 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f411xe.h | 5653 #define SPI_CR1_CPOL_Pos (1U) macro 5654 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f412cx.h | 10224 #define SPI_CR1_CPOL_Pos (1U) macro 10225 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f405xx.h | 11107 #define SPI_CR1_CPOL_Pos (1U) macro 11108 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f415xx.h | 11392 #define SPI_CR1_CPOL_Pos (1U) macro 11393 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f412zx.h | 11234 #define SPI_CR1_CPOL_Pos (1U) macro 11235 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f407xx.h | 11443 #define SPI_CR1_CPOL_Pos (1U) macro 11444 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f412vx.h | 11214 #define SPI_CR1_CPOL_Pos (1U) macro 11215 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f413xx.h | 11875 #define SPI_CR1_CPOL_Pos (1U) macro 11876 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f423xx.h | 12025 #define SPI_CR1_CPOL_Pos (1U) macro 12026 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f412rx.h | 11201 #define SPI_CR1_CPOL_Pos (1U) macro 11202 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f417xx.h | 11725 #define SPI_CR1_CPOL_Pos (1U) macro 11726 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f446xx.h | 12615 #define SPI_CR1_CPOL_Pos (1U) macro 12616 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f427xx.h | 12588 #define SPI_CR1_CPOL_Pos (1U) macro 12589 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f437xx.h | 12890 #define SPI_CR1_CPOL_Pos (1U) macro 12891 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32f429xx.h | 12944 #define SPI_CR1_CPOL_Pos (1U) macro 12945 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ |
H A D | stm32l073xx.h | 5420 #define SPI_CR1_CPOL_Pos (1U) macro 5421 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ |
H A D | stm32wb50xx.h | 8190 #define SPI_CR1_CPOL_Pos (1U) macro 8191 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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H A D | stm32wb55xx.h | 9335 #define SPI_CR1_CPOL_Pos (1U) macro 9336 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
H A D | stm32f407xx.h | 11459 #define SPI_CR1_CPOL_Pos (1U) macro 11460 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
H A D | stm32l451xx.h | 11891 #define SPI_CR1_CPOL_Pos (1U) macro 11892 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
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