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Searched refs:SPI_CR1_CPOL_Pos (Results 1 – 25 of 29) sorted by relevance

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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h5591 #define SPI_CR1_CPOL_Pos (1U) macro
5592 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f410tx.h5541 #define SPI_CR1_CPOL_Pos (1U) macro
5542 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f410cx.h5587 #define SPI_CR1_CPOL_Pos (1U) macro
5588 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f401xe.h5622 #define SPI_CR1_CPOL_Pos (1U) macro
5623 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f401xc.h5622 #define SPI_CR1_CPOL_Pos (1U) macro
5623 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f411xe.h5653 #define SPI_CR1_CPOL_Pos (1U) macro
5654 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f412cx.h10224 #define SPI_CR1_CPOL_Pos (1U) macro
10225 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f405xx.h11107 #define SPI_CR1_CPOL_Pos (1U) macro
11108 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f415xx.h11392 #define SPI_CR1_CPOL_Pos (1U) macro
11393 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f412zx.h11234 #define SPI_CR1_CPOL_Pos (1U) macro
11235 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f407xx.h11443 #define SPI_CR1_CPOL_Pos (1U) macro
11444 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f412vx.h11214 #define SPI_CR1_CPOL_Pos (1U) macro
11215 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f413xx.h11875 #define SPI_CR1_CPOL_Pos (1U) macro
11876 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f423xx.h12025 #define SPI_CR1_CPOL_Pos (1U) macro
12026 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f412rx.h11201 #define SPI_CR1_CPOL_Pos (1U) macro
11202 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f417xx.h11725 #define SPI_CR1_CPOL_Pos (1U) macro
11726 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f446xx.h12615 #define SPI_CR1_CPOL_Pos (1U) macro
12616 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f427xx.h12588 #define SPI_CR1_CPOL_Pos (1U) macro
12589 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f437xx.h12890 #define SPI_CR1_CPOL_Pos (1U) macro
12891 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32f429xx.h12944 #define SPI_CR1_CPOL_Pos (1U) macro
12945 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/
H A Dstm32l073xx.h5420 #define SPI_CR1_CPOL_Pos (1U) macro
5421 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
H A Dstm32wb50xx.h8190 #define SPI_CR1_CPOL_Pos (1U) macro
8191 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
H A Dstm32wb55xx.h9335 #define SPI_CR1_CPOL_Pos (1U) macro
9336 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h11459 #define SPI_CR1_CPOL_Pos (1U) macro
11460 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h11891 #define SPI_CR1_CPOL_Pos (1U) macro
11892 #define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */

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