Home
last modified time | relevance | path

Searched refs:SPI_CR1_CPHA_Pos (Results 1 – 25 of 29) sorted by relevance

12

/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h5588 #define SPI_CR1_CPHA_Pos (0U) macro
5589 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f410tx.h5538 #define SPI_CR1_CPHA_Pos (0U) macro
5539 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f410cx.h5584 #define SPI_CR1_CPHA_Pos (0U) macro
5585 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f401xe.h5619 #define SPI_CR1_CPHA_Pos (0U) macro
5620 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f401xc.h5619 #define SPI_CR1_CPHA_Pos (0U) macro
5620 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f411xe.h5650 #define SPI_CR1_CPHA_Pos (0U) macro
5651 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f412cx.h10221 #define SPI_CR1_CPHA_Pos (0U) macro
10222 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f405xx.h11104 #define SPI_CR1_CPHA_Pos (0U) macro
11105 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f415xx.h11389 #define SPI_CR1_CPHA_Pos (0U) macro
11390 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f412zx.h11231 #define SPI_CR1_CPHA_Pos (0U) macro
11232 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f407xx.h11440 #define SPI_CR1_CPHA_Pos (0U) macro
11441 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f412vx.h11211 #define SPI_CR1_CPHA_Pos (0U) macro
11212 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f413xx.h11872 #define SPI_CR1_CPHA_Pos (0U) macro
11873 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f423xx.h12022 #define SPI_CR1_CPHA_Pos (0U) macro
12023 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f412rx.h11198 #define SPI_CR1_CPHA_Pos (0U) macro
11199 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f417xx.h11722 #define SPI_CR1_CPHA_Pos (0U) macro
11723 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f446xx.h12612 #define SPI_CR1_CPHA_Pos (0U) macro
12613 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f427xx.h12585 #define SPI_CR1_CPHA_Pos (0U) macro
12586 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f437xx.h12887 #define SPI_CR1_CPHA_Pos (0U) macro
12888 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32f429xx.h12941 #define SPI_CR1_CPHA_Pos (0U) macro
12942 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/
H A Dstm32l073xx.h5417 #define SPI_CR1_CPHA_Pos (0U) macro
5418 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
H A Dstm32wb50xx.h8187 #define SPI_CR1_CPHA_Pos (0U) macro
8188 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
H A Dstm32wb55xx.h9332 #define SPI_CR1_CPHA_Pos (0U) macro
9333 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h11456 #define SPI_CR1_CPHA_Pos (0U) macro
11457 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h11888 #define SPI_CR1_CPHA_Pos (0U) macro
11889 #define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */

12