Searched refs:SDIO_ICR_DCRCFAILC_Pos (Results 1 – 21 of 21) sorted by relevance
5490 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro5491 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
5521 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro5522 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
10103 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro10104 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
10975 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro10976 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11260 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11261 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11113 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11114 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11311 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11312 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11093 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11094 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11754 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11755 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11904 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11905 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11080 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11081 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11593 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11594 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
12495 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro12496 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
12456 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro12457 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
12758 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro12759 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
12812 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro12813 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
13106 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro13107 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
15836 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro15837 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
16133 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro16134 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
11327 #define SDIO_ICR_DCRCFAILC_Pos (1U) macro11328 #define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */