/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
H A D | stm32f410rx.h | 2469 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 2470 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f410tx.h | 2459 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 2460 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f410cx.h | 2469 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 2470 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f401xe.h | 2390 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 2391 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f401xc.h | 2390 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 2391 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f411xe.h | 2393 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 2394 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f412cx.h | 6543 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6544 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f405xx.h | 6479 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6480 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f415xx.h | 6661 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6662 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f412zx.h | 6603 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6604 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f407xx.h | 6779 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6780 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f412vx.h | 6601 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6602 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f413xx.h | 6919 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6920 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f423xx.h | 6955 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6956 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f412rx.h | 6597 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6598 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f417xx.h | 6958 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6959 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f446xx.h | 6965 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6966 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f427xx.h | 7169 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 7170 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f437xx.h | 7361 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 7362 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f429xx.h | 7228 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 7229 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f439xx.h | 7415 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 7416 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f469xx.h | 10405 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 10406 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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H A D | stm32f479xx.h | 10595 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 10596 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
H A D | stm32f407xx.h | 6795 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro 6796 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
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