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Searched refs:FLASH_OPTCR_WDG_SW_Pos (Results 1 – 24 of 24) sorted by relevance

/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h2469 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
2470 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f410tx.h2459 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
2460 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f410cx.h2469 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
2470 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f401xe.h2390 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
2391 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f401xc.h2390 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
2391 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f411xe.h2393 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
2394 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f412cx.h6543 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6544 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f405xx.h6479 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6480 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f415xx.h6661 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6662 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f412zx.h6603 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6604 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f407xx.h6779 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6780 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f412vx.h6601 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6602 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f413xx.h6919 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6920 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f423xx.h6955 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6956 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f412rx.h6597 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6598 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f417xx.h6958 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6959 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f446xx.h6965 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6966 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f427xx.h7169 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
7170 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f437xx.h7361 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
7362 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f429xx.h7228 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
7229 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f439xx.h7415 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
7416 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f469xx.h10405 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
10406 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
H A Dstm32f479xx.h10595 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
10596 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h6795 #define FLASH_OPTCR_WDG_SW_Pos (5U) macro
6796 #define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */