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Searched refs:ADC_CR2_SWSTART_Pos (Results 1 – 24 of 24) sorted by relevance

/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h850 #define ADC_CR2_SWSTART_Pos (30U) macro
851 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f410tx.h840 #define ADC_CR2_SWSTART_Pos (30U) macro
841 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f410cx.h850 #define ADC_CR2_SWSTART_Pos (30U) macro
851 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f401xe.h952 #define ADC_CR2_SWSTART_Pos (30U) macro
953 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f401xc.h952 #define ADC_CR2_SWSTART_Pos (30U) macro
953 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f411xe.h955 #define ADC_CR2_SWSTART_Pos (30U) macro
956 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f412cx.h1145 #define ADC_CR2_SWSTART_Pos (30U) macro
1146 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f405xx.h1186 #define ADC_CR2_SWSTART_Pos (30U) macro
1187 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f415xx.h1260 #define ADC_CR2_SWSTART_Pos (30U) macro
1261 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f412zx.h1205 #define ADC_CR2_SWSTART_Pos (30U) macro
1206 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f407xx.h1290 #define ADC_CR2_SWSTART_Pos (30U) macro
1291 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f412vx.h1203 #define ADC_CR2_SWSTART_Pos (30U) macro
1204 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f413xx.h1334 #define ADC_CR2_SWSTART_Pos (30U) macro
1335 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f423xx.h1370 #define ADC_CR2_SWSTART_Pos (30U) macro
1371 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f412rx.h1199 #define ADC_CR2_SWSTART_Pos (30U) macro
1200 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f417xx.h1364 #define ADC_CR2_SWSTART_Pos (30U) macro
1365 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f446xx.h1307 #define ADC_CR2_SWSTART_Pos (30U) macro
1308 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f427xx.h1384 #define ADC_CR2_SWSTART_Pos (30U) macro
1385 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f437xx.h1462 #define ADC_CR2_SWSTART_Pos (30U) macro
1463 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f429xx.h1440 #define ADC_CR2_SWSTART_Pos (30U) macro
1441 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f439xx.h1516 #define ADC_CR2_SWSTART_Pos (30U) macro
1517 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f469xx.h1531 #define ADC_CR2_SWSTART_Pos (30U) macro
1532 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
H A Dstm32f479xx.h1607 #define ADC_CR2_SWSTART_Pos (30U) macro
1608 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h1306 #define ADC_CR2_SWSTART_Pos (30U) macro
1307 #define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */