/aosp_15_r20/external/mesa3d/src/compiler/nir/tests/ |
H A D | load_store_vectorizer_tests.cpp | 193 case nir_var_mem_push_const: in create_indirect_load() 211 if (mode != nir_var_mem_push_const) { in create_indirect_load() 478 create_load(nir_var_mem_push_const, 0, 0, 0x1); in TEST_F() 479 create_load(nir_var_mem_push_const, 0, 4, 0x2); in TEST_F() 484 EXPECT_TRUE(run_vectorizer(nir_var_mem_push_const)); in TEST_F() 498 create_load(nir_var_mem_push_const, 0, 0, 0x1); in TEST_F() 499 nir_intrinsic_set_base(create_load(nir_var_mem_push_const, 0, 0, 0x2), 4); in TEST_F() 504 EXPECT_TRUE(run_vectorizer(nir_var_mem_push_const)); in TEST_F() 1527 create_load(nir_var_mem_push_const, 0, 0, 0x1); in TEST_F() 1528 nir_intrinsic_set_base(create_load(nir_var_mem_push_const, 0, 4, 0x2), 4); in TEST_F() [all …]
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/aosp_15_r20/external/mesa3d/src/amd/common/ |
H A D | ac_nir_lower_subdword_loads.c | 56 if (!(modes & nir_var_mem_push_const)) in lower_subdword_loads()
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/aosp_15_r20/external/mesa3d/src/amd/vulkan/ |
H A D | radv_pipeline.c | 402 ….modes = nir_var_mem_ssbo | nir_var_mem_ubo | nir_var_mem_push_const | nir_var_mem_shared | nir_va… in radv_postprocess_nir() 438 (ac_nir_lower_subdword_options){.modes_1_comp = nir_var_mem_ubo | nir_var_mem_push_const, in radv_postprocess_nir() 439 … .modes_N_comps = nir_var_mem_ubo | nir_var_mem_push_const | nir_var_mem_ssbo}); in radv_postprocess_nir()
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/aosp_15_r20/external/mesa3d/src/compiler/nir/ |
H A D | nir_opt_load_store_vectorize.c | 82 LOAD(nir_var_mem_push_const, push_constant, -1, 0, -1, 1) in get_info() 588 restrict_modes |= nir_var_uniform | nir_var_mem_push_const; in create_entry() 979 nir_var_mem_push_const | nir_var_mem_ubo)) in check_for_aliasing()
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H A D | nir_lower_mem_access_bit_sizes.c | 412 return nir_var_mem_push_const; in intrin_to_variable_mode()
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H A D | nir_opt_gcm.c | 279 nir_var_mem_push_const)) { in pin_intrinsic()
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H A D | nir_lower_io.c | 955 nir_var_mem_push_const | nir_var_mem_constant)); in build_addr_for_var() 1490 case nir_var_mem_push_const: in build_explicit_io_load() 1562 } else if (mode == nir_var_mem_push_const) { in build_explicit_io_load()
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H A D | nir.c | 242 case nir_var_mem_push_const: in nir_shader_add_variable() 1462 nir_deref_mode_is(nir_src_as_deref(intr->src[0]), nir_var_mem_push_const)) in nir_src_is_always_uniform()
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H A D | nir.h | 191 nir_var_mem_push_const = (1 << 8), enumerator 220 nir_var_mem_push_const | nir_var_mem_task_payload |
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H A D | nir_validate.c | 1767 nir_var_mem_push_const | in nir_validate_shader()
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H A D | nir_print.c | 712 case nir_var_mem_push_const: in get_variable_mode_str()
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/aosp_15_r20/external/mesa3d/src/vulkan/runtime/ |
H A D | vk_meta_clear.c | 64 nir_variable *push = nir_variable_create(b->shader, nir_var_mem_push_const, in build_clear_shader()
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H A D | vk_meta_blit_resolve.c | 213 nir_variable *push = nir_variable_create(b->shader, nir_var_mem_push_const, in build_blit_shader()
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/aosp_15_r20/external/mesa3d/src/nouveau/vulkan/ |
H A D | nvk_query_pool.c | 869 nir_variable *push = nir_variable_create(b->shader, nir_var_mem_push_const, in build_copy_queries_shader()
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H A D | nvk_shader.c | 430 NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_push_const, in nvk_lower_nir()
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/aosp_15_r20/external/mesa3d/src/microsoft/spirv_to_dxil/ |
H A D | dxil_spirv_nir.c | 995 NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_push_const, in dxil_spirv_nir_passes()
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/aosp_15_r20/external/mesa3d/src/panfrost/vulkan/ |
H A D | panvk_vX_shader.c | 444 NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_push_const, in panvk_lower_nir()
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/aosp_15_r20/external/mesa3d/src/asahi/vulkan/ |
H A D | hk_shader.c | 575 NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_push_const, in hk_lower_nir()
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/aosp_15_r20/external/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
H A D | nir_to_spirv.c | 499 case nir_var_mem_push_const: in get_storage_class() 753 if (var->data.mode == nir_var_mem_push_const) { in input_var_init() 4571 nir_foreach_variable_with_modes(var, s, nir_var_mem_push_const) in nir_to_spirv()
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/aosp_15_r20/external/mesa3d/src/gallium/frontends/lavapipe/ |
H A D | lvp_pipeline.c | 390 NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_push_const, in lvp_shader_lower()
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/aosp_15_r20/external/mesa3d/src/intel/vulkan_hasvk/ |
H A D | anv_pipeline.c | 510 NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_push_const, in anv_pipeline_lower_nir()
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/aosp_15_r20/external/mesa3d/src/panfrost/midgard/ |
H A D | midgard_compile.c | 426 .modes = nir_var_mem_ubo | nir_var_mem_push_const | nir_var_mem_ssbo | in midgard_preprocess_nir()
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/aosp_15_r20/external/mesa3d/src/compiler/spirv/ |
H A D | vtn_variables.c | 1778 nir_mode = nir_var_mem_push_const; in vtn_storage_class_to_mode()
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/aosp_15_r20/external/mesa3d/src/broadcom/vulkan/ |
H A D | v3dv_pipeline.c | 313 nir_var_mem_push_const, in preprocess_nir()
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/aosp_15_r20/external/mesa3d/src/microsoft/compiler/ |
H A D | dxil_nir.c | 2099 …d req_align = (nir_deref_mode_is_one_of(deref, nir_var_mem_ubo | nir_var_mem_push_const) ? 16 : 4); in dxil_nir_split_unaligned_loads_stores()
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