Searched +full:usart +full:- +full:mode (Results 1 – 25 of 37) sorted by relevance
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/linux-6.14.4/Documentation/devicetree/bindings/serial/ |
D | atmel,at91-usart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) 11 - Richard Genoud <[email protected]> 16 - enum: 17 - atmel,at91rm9200-usart 18 - atmel,at91sam9260-usart 19 - items: [all …]
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/linux-6.14.4/arch/arm/boot/dts/microchip/ |
D | sam9x7.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sam9x7.dtsi - Device Tree Include file for Microchip SAM9X7 SoC family 10 #include <dt-bindings/clock/at91.h> 11 #include <dt-bindings/dma/at91.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 15 #include <dt-bindings/mfd/at91-usart.h> 16 #include <dt-bindings/mfd/atmel-flexcom.h> 17 #include <dt-bindings/pinctrl/at91.h> [all …]
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D | sama5d3_uart.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with 9 #include <dt-bindings/pinctrl/at91.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 24 pinctrl_uart0: uart0-0 { 32 pinctrl_uart1: uart1-0 { 41 compatible = "atmel,at91sam9260-usart"; 43 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; [all …]
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D | sam9x60.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC 10 #include <dt-bindings/dma/at91.h> 11 #include <dt-bindings/pinctrl/at91.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/clock/at91.h> 15 #include <dt-bindings/mfd/at91-usart.h> 16 #include <dt-bindings/mfd/atmel-flexcom.h> 19 #address-cells = <1>; [all …]
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D | at91sam9260.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC 7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <[email protected]> 10 #include <dt-bindings/pinctrl/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/clock/at91.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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D | sama5d2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC 9 #include <dt-bindings/dma/at91.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 13 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 20 interrupt-parent = <&aic>; [all …]
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D | at91rm9200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/mfd/at91-usart.h> 19 #address-cells = <1>; 20 #size-cells = <1>; 23 interrupt-parent = <&aic>; [all …]
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D | at91sam9x5_usart3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 4 * 4 USART. 9 #include <dt-bindings/pinctrl/at91.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/mfd/at91-usart.h> 22 pinctrl_usart3: usart3-0 { 28 pinctrl_usart3_rts: usart3_rts-0 { 33 pinctrl_usart3_cts: usart3_cts-0 { 38 pinctrl_usart3_sck: usart3_sck-0 { [all …]
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D | at91sam9x5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC 11 #include <dt-bindings/dma/at91.h> 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/mfd/at91-usart.h> 19 #address-cells = <1>; 20 #size-cells = <1>; [all …]
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D | at91sam9rl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC 6 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 9 #include <dt-bindings/pinctrl/at91.h> 10 #include <dt-bindings/clock/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/pwm/pwm.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; [all …]
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D | at91sam9n12.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC 9 #include <dt-bindings/dma/at91.h> 10 #include <dt-bindings/pinctrl/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/clock/at91.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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D | at91sam9261.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC 5 * Copyright (C) 2013 Jean-Jacques Hiblot <[email protected]> 8 #include <dt-bindings/pinctrl/at91.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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D | sama5d4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC 9 #include <dt-bindings/clock/at91.h> 10 #include <dt-bindings/dma/at91.h> 11 #include <dt-bindings/mfd/at91-usart.h> 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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D | sama5d3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC 10 #include <dt-bindings/dma/at91.h> 11 #include <dt-bindings/pinctrl/at91.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/clock/at91.h> 15 #include <dt-bindings/mfd/at91-usart.h> 18 #address-cells = <1>; 19 #size-cells = <1>; [all …]
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D | sama7d65.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama7d65.dtsi - Device Tree Include file for SAMA7D65 SoC 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 15 #include <dt-bindings/mfd/at91-usart.h> 20 #address-cells = <1>; 21 #size-cells = <1>; 22 interrupt-parent = <&gic>; [all …]
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D | at91sam9g45.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC 11 #include <dt-bindings/dma/at91.h> 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/mfd/at91-usart.h> 19 #address-cells = <1>; 20 #size-cells = <1>; [all …]
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D | at91sam9263.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <[email protected]> 8 #include <dt-bindings/pinctrl/at91.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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D | sama7g5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC 12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/dma/at91.h> 17 #include <dt-bindings/gpio/gpio.h> 18 #include <dt-bindings/mfd/at91-usart.h> 19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h> [all …]
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D | at91-ariag25.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-ariag25.dts - Device Tree file for Acme Systems Aria G25 (AT91SAM9G25 based) 8 /dts-v1/; 32 clock-frequency = <32768>; 36 clock-frequency = <12000000>; 41 compatible = "gpio-leds"; 47 linux,default-trigger = "heartbeat"; 53 compatible = "w1-gpio"; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&pinctrl_w1_0>; [all …]
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/linux-6.14.4/drivers/mfd/ |
D | at91-usart.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Driver for AT91 USART 11 #include <dt-bindings/mfd/at91-usart.h> 29 device_property_read_u32(&pdev->dev, "atmel,usart-mode", &opmode); in at91_usart_mode_probe() 39 dev_err(&pdev->dev, "atmel,usart-mode has an invalid value %u\n", in at91_usart_mode_probe() 41 return -EINVAL; in at91_usart_mode_probe() 44 return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, cell, 1, in at91_usart_mode_probe() 49 { .compatible = "atmel,at91rm9200-usart" }, 50 { .compatible = "atmel,at91sam9260-usart" }, 67 MODULE_DESCRIPTION("AT91 USART MFD driver");
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/linux-6.14.4/Documentation/devicetree/bindings/mfd/ |
D | atmel,sama5d2-flexcom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/atmel,sama5d2-flexcom.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kavyasree Kotagiri <[email protected]> 14 an I2C controller and an USART. Only one function can be used at a 20 - const: atmel,sama5d2-flexcom 21 - items: 22 - const: microchip,sam9x7-flexcom 23 - const: atmel,sama5d2-flexcom [all …]
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/linux-6.14.4/drivers/tty/serial/ |
D | atmel_serial.c | 1 // SPDX-License-Identifier: GPL-2.0+ 18 #include <linux/clk-provider.h> 24 #include <linux/dma-mapping.h> 62 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we 71 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port 96 * can contain up to 1024 characters in PIO mode and up to 4096 characters in 97 * DMA mode. 167 bool hd_start_rx; /* can start RX during half-duplex operation */ 197 { .compatible = "atmel,at91rm9200-usart-serial" }, 210 return __raw_readl(port->membase + reg); in atmel_uart_readl() [all …]
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D | atmel_serial.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 8 * USART registers. 27 #define ATMEL_US_STTTO BIT(11) /* Start Time-out */ 31 #define ATMEL_US_RETTO BIT(15) /* Rearm Time-out */ 42 #define ATMEL_US_MR 0x04 /* Mode Register */ 43 #define ATMEL_US_USMODE GENMASK(3, 0) /* Mode of the USART */ 62 #define ATMEL_US_SYNC BIT(8) /* Synchronous Mode Select */ 75 #define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */ 81 #define ATMEL_US_MODE9 BIT(17) /* 9-bit Character Length */ 83 #define ATMEL_US_OVER BIT(19) /* Oversampling Mode */ [all …]
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/linux-6.14.4/drivers/spi/ |
D | spi-at91-usart.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Driver for AT91 USART Controllers as SPI 12 #include <linux/dma-direction.h> 69 readl_relaxed((port)->regs + US_##reg) 71 writel_relaxed((value), (port)->regs + US_##reg) 74 readb_relaxed((port)->regs + US_##reg) 76 writeb_relaxed((value), (port)->regs + US_##reg) 109 aus->current_rx_remaining_bytes = 0; in dma_callback() 110 complete(&aus->xfer_completion); in dma_callback() 119 return aus->use_dma && xfer->len >= US_DMA_MIN_BYTES; in at91_usart_spi_can_dma() [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/dma/stm32/ |
D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The STM32 DMA is a general-purpose direct memory access controller capable of 13 described in the dma.txt file, using a four-cell specifier for each 19 -bit 9: Peripheral Increment Address 22 -bit 10: Memory Increment Address 25 -bit 15: Peripheral Increment Offset Size 27 0x1: offset size is fixed to 4 (32-bit alignment) [all …]
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