Lines Matching +full:usart +full:- +full:mode
1 /* SPDX-License-Identifier: GPL-2.0+ */
8 * USART registers.
27 #define ATMEL_US_STTTO BIT(11) /* Start Time-out */
31 #define ATMEL_US_RETTO BIT(15) /* Rearm Time-out */
42 #define ATMEL_US_MR 0x04 /* Mode Register */
43 #define ATMEL_US_USMODE GENMASK(3, 0) /* Mode of the USART */
62 #define ATMEL_US_SYNC BIT(8) /* Synchronous Mode Select */
75 #define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */
81 #define ATMEL_US_MODE9 BIT(17) /* 9-bit Character Length */
83 #define ATMEL_US_OVER BIT(19) /* Oversampling Mode */
99 #define ATMEL_US_TIMEOUT BIT(8) /* Receiver Time-out */
126 #define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register for USART */
127 #define ATMEL_UA_RTOR 0x28 /* Receiver Time-out Register for UART */
128 #define ATMEL_US_TO GENMASK(15, 0) /* Time-out Value */
138 #define ATMEL_US_FMR 0xa0 /* FIFO Mode Register */
139 #define ATMEL_US_TXRDYM(data) FIELD_PREP(GENMASK(1, 0), (data)) /* TX Ready Mode */
140 #define ATMEL_US_RXRDYM(data) FIELD_PREP(GENMASK(5, 4), (data)) /* RX Ready Mode */