| /linux-6.14.4/tools/perf/pmu-events/arch/x86/meteorlake/ |
| D | virtual-memory.json | 9 "Unit": "cpu_atom" string
19 "Unit": "cpu_core" string
30 "Unit": "cpu_core" string
39 "Unit": "cpu_atom" string
49 "Unit": "cpu_core" string
56 …mpleted page walks (1G sizes) caused by demand data loads. This implies address translations miss…
59 "Unit": "cpu_core" string
66 …ber of page walks completed due to loads (including SW prefetches) whose address translations miss…
69 "Unit": "cpu_atom" string
76 …eted page walks (2M/4M sizes) caused by demand data loads. This implies address translations miss…
[all …]
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| D | memory.json | 10 "Unit": "cpu_core" string
20 "Unit": "cpu_core" string
23 …o any number of reasons, including an L1 miss, WCB full, pagewalk, store address block or store da…
29 "Unit": "cpu_atom" string
32 …f the load buffer is stalled due to a core bound stall including a store address match, a DTLB mis…
38 "Unit": "cpu_atom" string
47 "Unit": "cpu_atom" string
57 "Unit": "cpu_atom" string
66 "Unit": "cpu_atom" string
69 …ad (oldest load) of the load buffer and retirement are both stalled due to a store address match.",
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | srio-rmu.txt | 1 Message unit node:
3 For SRIO controllers that implement the message unit as part of the controller
5 node is composed of three types of sub-nodes ("fsl-srio-msg-unit",
6 "fsl-srio-dbell-unit" and "fsl-srio-port-write-unit").
10 - compatible
13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
18 - reg
20 Value type: <prop-encoded-array>
21 Definition: A standard property. Specifies the physical address and
25 - fsl,liodn
[all …]
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| /linux-6.14.4/tools/perf/pmu-events/arch/x86/alderlake/ |
| D | virtual-memory.json | 10 "Unit": "cpu_core" string
21 "Unit": "cpu_core" string
28 …ber of page walks completed due to loads (including SW prefetches) whose address translations miss…
31 "Unit": "cpu_atom" string
41 "Unit": "cpu_core" string
48 …mpleted page walks (1G sizes) caused by demand data loads. This implies address translations miss…
51 "Unit": "cpu_core" string
58 …eted page walks (2M/4M sizes) caused by demand data loads. This implies address translations miss…
61 "Unit": "cpu_core" string
68 …mpleted page walks (4K sizes) caused by demand data loads. This implies address translations miss…
[all …]
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| D | memory.json | 10 "Unit": "cpu_core" string
13 …o any number of reasons, including an L1 miss, WCB full, pagewalk, store address block or store da…
19 "Unit": "cpu_atom" string
22 …f the load buffer is stalled due to a core bound stall including a store address match, a DTLB mis…
28 "Unit": "cpu_atom" string
37 "Unit": "cpu_atom" string
47 "Unit": "cpu_atom" string
56 "Unit": "cpu_atom" string
59 …ad (oldest load) of the load buffer and retirement are both stalled due to a store address match.",
65 "Unit": "cpu_atom" string
[all …]
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| /linux-6.14.4/arch/x86/events/intel/ |
| D | uncore_discovery.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
36 #define uncore_discovery_invalid_unit(unit) \ argument
37 (!unit.table1 || !unit.ctl || \
38 unit.table1 == -1ULL || unit.ctl == -1ULL || \
39 unit.table3 == -1ULL)
78 u64 ctl; /* Global Control Address */
104 u64 ctl; /* Unit Control Address */
119 unsigned int id; /* Unit ID */
121 u64 addr; /* Unit Control Address */
127 struct rb_root units; /* Unit ctrl addr for all units */
|
| /linux-6.14.4/arch/x86/include/asm/ |
| D | iosf_mbi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
63 * iosf_mbi_read() - MailBox Interface read command
66 * @offset: register address offset
69 * Locking is handled by spinlock - cannot sleep.
75 * iosf_mbi_write() - MailBox unmasked write command
78 * @offset: register address offset
81 * Locking is handled by spinlock - cannot sleep.
87 * iosf_mbi_modify() - MailBox masked write command
90 * @offset: register address offset
94 * Locking is handled by spinlock - cannot sleep.
[all …]
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| /linux-6.14.4/arch/mips/cavium-octeon/ |
| D | octeon-memcpy.S | 18 #include <asm/asm-offsets.h>
30 * - src and dst don't overlap
31 * - src is readable
32 * - dst is writable
40 * - src is readable (no exceptions when reading src)
42 * - dst is writable (no exceptions when writing dst)
43 * __copy_user uses a non-standard calling convention; see
57 * 1- AT contain the address of the byte just past the end of the source
59 * 2- src_entry <= src < AT, and
60 * 3- (dst - src) == (dst_entry - src_entry),
[all …]
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| /linux-6.14.4/sound/firewire/dice/ |
| D | dice-transaction.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * dice_transaction.c - a part of driver for Dice based devices
16 offset += dice->tx_offset; in get_subaddr()
19 offset += dice->rx_offset; in get_subaddr()
22 offset += dice->sync_offset; in get_subaddr()
25 offset += dice->rsrv_offset; in get_subaddr()
29 offset += dice->global_offset; in get_subaddr()
40 return snd_fw_transaction(dice->unit, in snd_dice_transaction_write()
50 return snd_fw_transaction(dice->unit, in snd_dice_transaction_read()
87 err = -ENOSYS; in snd_dice_transaction_get_rate()
[all …]
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| /linux-6.14.4/drivers/scsi/ |
| D | sense_codes.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * http://www.t10.org/lists/asc-num.txt [most recent: 20200817]
9 SENSE_CODE(0x0002, "End-of-partition/medium detected")
11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected")
12 SENSE_CODE(0x0005, "End-of-data detected")
29 SENSE_CODE(0x001F, "Logical unit transitioning to another power condition")
42 SENSE_CODE(0x0400, "Logical unit not ready, cause not reportable")
43 SENSE_CODE(0x0401, "Logical unit is in process of becoming ready")
44 SENSE_CODE(0x0402, "Logical unit not ready, initializing command required")
45 SENSE_CODE(0x0403, "Logical unit not ready, manual intervention required")
[all …]
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| /linux-6.14.4/tools/perf/pmu-events/arch/x86/silvermont/ |
| D | pipeline.json | 8 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
17 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
27 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
37 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
47 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
57 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
67 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
77 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
87 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
97 … All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the targ…
[all …]
|
| /linux-6.14.4/drivers/net/ethernet/netronome/nfp/nfpcore/ |
| D | nfp_cpp.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
6 * Interface for low-level NFP CPP access.
22 dev_err(nfp_cpp_device(cpp)->parent, NFP_SUBSYS ": " fmt, ## args)
24 dev_warn(nfp_cpp_device(cpp)->parent, NFP_SUBSYS ": " fmt, ## args)
26 dev_info(nfp_cpp_device(cpp)->parent, NFP_SUBSYS ": " fmt, ## args)
28 dev_dbg(nfp_cpp_device(cpp)->parent, NFP_SUBSYS ": " fmt, ## args)
30 dev_printk(level, nfp_cpp_device(cpp)->parent, \
69 * NFP_CPP_ID() - pack target, token, and action into a CPP ID.
74 * Create a 32-bit CPP identifier representing the access to be made.
[all …]
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| /linux-6.14.4/tools/perf/pmu-events/arch/x86/amdzen4/ |
| D | cache.json | 5 …"BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for loa…
11 …"BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for har…
17 …"BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for all…
35 …"BriefDescription": "Demand data cache fills from cache of another CCX when the address was in the…
47 …"BriefDescription": "Demand data cache fills from cache of another CCX when the address was in a d…
89 …"BriefDescription": "Any data cache fills from cache of another CCX when the address was in the sa…
101 …"BriefDescription": "Any data cache fills from cache of another CCX when the address was in a diff…
107 …"BriefDescription": "Any data cache fills from cache of another CCX when the address was in the sa…
125 …data cache fills from either cache of another CCX, DRAM or MMIO when the address was in a differen…
161 …eculative) of type PrefetchNTA (move data with minimum cache pollution i.e. non-temporal access).",
[all …]
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| /linux-6.14.4/arch/mips/lib/ |
| D | memcpy.S | 23 * dma-coherent systems.
37 #include <asm/asm-offsets.h>
49 * - src and dst don't overlap
50 * - src is readable
51 * - dst is writable
59 * - src is readable (no exceptions when reading src)
61 * - dst is writable (no exceptions when writing dst)
62 * __copy_user uses a non-standard calling convention; see
63 * include/asm-mips/uaccess.h
76 * 1- AT contain the address of the byte just past the end of the source
[all …]
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| /linux-6.14.4/drivers/media/platform/st/sti/delta/ |
| D | delta.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-mem2mem.h>
14 #include "delta-cfg.h"
17 * enum delta_state - state of decoding instance
28 * Decoding instance is ready to decode compressed access unit.
46 * struct delta_streaminfo - information about stream to decode
89 * struct delta_au - access unit structure.
94 * @vaddr: virtual address (kernel can read/write)
95 * @paddr: physical address (for hardware)
[all …]
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| /linux-6.14.4/sound/firewire/ |
| D | lib.c | 1 // SPDX-License-Identifier: GPL-2.0-only
18 * snd_fw_transaction - send a request and wait for its completion
19 * @unit: the driver's unit on the target device
21 * @offset: the address in the target's address space
29 * response. The node ID and the current generation are derived from @unit.
33 int snd_fw_transaction(struct fw_unit *unit, int tcode, in snd_fw_transaction() argument
37 struct fw_device *device = fw_parent_device(unit); in snd_fw_transaction()
43 generation = device->generation; in snd_fw_transaction()
46 rcode = fw_run_transaction(device->card, tcode, in snd_fw_transaction()
47 device->node_id, generation, in snd_fw_transaction()
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
| D | mediatek,mt8188-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hui Liu <[email protected]>
17 const: mediatek,mt8188-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
25 are defined in <dt-bindings/gpio/gpio.h>.
28 gpio-ranges:
[all …]
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| /linux-6.14.4/arch/powerpc/platforms/44x/ |
| D | fsp2.h | 14 #define DCRN_PLB4_P0EARL 0x014 /* PLB0 Error Address Register Low */
15 #define DCRN_PLB4_P0EARH 0x015 /* PLB0 Error Address Register High */
22 #define DCRN_PLB4_P1EARL 0x01C /* PLB1 Error Address Register Low */
23 #define DCRN_PLB4_P1EARH 0x01D /* PLB1 Error Address Register High */
33 #define PLB4OPB_GESR0 0x0 /* Error status 0: Master Dev 0-3 */
34 #define PLB4OPB_GEAR 0x2 /* Error Address Register */
35 #define PLB4OPB_GEARU 0x3 /* Error Upper Address Register */
36 #define PLB4OPB_GESR1 0x4 /* Error Status 1: Master Dev 4-7 */
37 #define PLB4OPB_GESR2 0xC /* Error Status 2: Master Dev 8-11 */
39 /* PLB4-to-AHB Bridge */
[all …]
|
| /linux-6.14.4/tools/perf/pmu-events/arch/x86/lunarlake/ |
| D | pipeline.json | 10 "Unit": "cpu_atom" string
20 "Unit": "cpu_core" string
28 …address enables the processor to begin executing instructions before the non-speculative execution…
30 "Unit": "cpu_atom" string
40 "Unit": "cpu_core" string
48 "Unit": "cpu_atom" string
57 "Unit": "cpu_core" string
65 "Unit": "cpu_atom" string
74 "Unit": "cpu_core" string
82 "Unit": "cpu_atom" string
[all …]
|
| /linux-6.14.4/sound/firewire/fireworks/ |
| D | fireworks_transaction.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * fireworks_transaction.c - a part of driver for Fireworks based devices
5 * Copyright (c) 2013-2014 Takashi Sakamoto
22 * data[6-]: Parameters
24 * Transaction address:
28 * I note that the address for response can be changed by command. But this
29 * module uses the default address.
54 struct fw_unit *unit; member
62 int snd_efw_transaction_cmd(struct fw_unit *unit, in snd_efw_transaction_cmd() argument
65 return snd_fw_transaction(unit, TCODE_WRITE_BLOCK_REQUEST, in snd_efw_transaction_cmd()
[all …]
|
| /linux-6.14.4/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | uncore-memory.json | 8 … to DRAM on a per channel basis. CAS commands are issued to specify the address to read or write …
11 "Unit": "iMC" string
19 …Counts all CAS (Column Address Select) commands issued to DRAM per memory channel. CAS commands a…
22 "Unit": "iMC" string
33 "Unit": "iMC" string
44 "Unit": "iMC" string
54 "Unit": "iMC" string
64 "Unit": "iMC" string
74 "Unit": "iMC" string
84 "Unit": "iMC" string
[all …]
|
| /linux-6.14.4/drivers/infiniband/hw/hns/ |
| D | hns_roce_hem.c | 15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
54 hop_num = hr_dev->caps.qpc_hop_num; in hns_roce_check_whether_mhop()
57 hop_num = hr_dev->caps.mpt_hop_num; in hns_roce_check_whether_mhop()
60 hop_num = hr_dev->caps.cqc_hop_num; in hns_roce_check_whether_mhop()
63 hop_num = hr_dev->caps.srqc_hop_num; in hns_roce_check_whether_mhop()
66 hop_num = hr_dev->caps.sccc_hop_num; in hns_roce_check_whether_mhop()
69 hop_num = hr_dev->caps.qpc_timer_hop_num; in hns_roce_check_whether_mhop()
72 hop_num = hr_dev->caps.cqc_timer_hop_num; in hns_roce_check_whether_mhop()
75 hop_num = hr_dev->caps.gmv_hop_num; in hns_roce_check_whether_mhop()
[all …]
|
| /linux-6.14.4/Documentation/devicetree/bindings/ |
| D | dts-coding-style.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 ---------------------------
24 * Lowercase characters: [a-z]
25 * Digits: [0-9]
26 * Dash: -
30 * Lowercase characters: [a-z]
31 * Digits: [0-9]
34 3. Unless a bus defines differently, unit addresses shall use lowercase
37 4. Hex values in properties, e.g. "reg", shall use lowercase hex. The address
42 gpi_dma2: dma-controller@a00000 {
[all …]
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| /linux-6.14.4/tools/perf/pmu-events/arch/x86/jaketown/ |
| D | uncore-cache.json | 7 "Unit": "CBOX" string
15 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an…
16 "Unit": "CBOX" string
23 "Unit": "CBOX" string
31 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
33 "Unit": "CBOX" string
41 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
43 "Unit": "CBOX" string
51 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
53 "Unit": "CBOX" string
[all …]
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| /linux-6.14.4/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | uncore-memory.json | 8 … to DRAM on a per channel basis. CAS commands are issued to specify the address to read or write …
11 "Unit": "iMC" string
19 …Counts all CAS (Column Address Select) commands issued to DRAM per memory channel. CAS commands a…
22 "Unit": "iMC" string
33 "Unit": "iMC" string
44 "Unit": "iMC" string
54 "Unit": "iMC" string
64 "Unit": "iMC" string
74 "Unit": "iMC" string
84 "Unit": "iMC" string
[all …]
|