1.. SPDX-License-Identifier: GPL-2.0
2
3=====================================
4Devicetree Sources (DTS) Coding Style
5=====================================
6
7When writing Devicetree Sources (DTS) please observe below guidelines.  They
8should be considered complementary to any rules expressed already in
9the Devicetree Specification and the dtc compiler (including W=1 and W=2
10builds).
11
12Individual architectures and subarchitectures can define additional rules,
13making the coding style stricter.
14
15Naming and Valid Characters
16---------------------------
17
18The Devicetree Specification allows a broad range of characters in node
19and property names, but this coding style narrows the range down to achieve
20better code readability.
21
221. Node and property names can use only the following characters:
23
24   * Lowercase characters: [a-z]
25   * Digits: [0-9]
26   * Dash: -
27
282. Labels can use only the following characters:
29
30   * Lowercase characters: [a-z]
31   * Digits: [0-9]
32   * Underscore: _
33
343. Unless a bus defines differently, unit addresses shall use lowercase
35   hexadecimal digits, without leading zeros (padding).
36
374. Hex values in properties, e.g. "reg", shall use lowercase hex.  The address
38   part can be padded with leading zeros.
39
40Example::
41
42	gpi_dma2: dma-controller@a00000 {
43		compatible = "qcom,sm8550-gpi-dma", "qcom,sm6350-gpi-dma";
44		reg = <0x0 0x00a00000 0x0 0x60000>;
45	}
46
47Order of Nodes
48--------------
49
501. Nodes on any bus, thus using unit addresses for children, shall be
51   ordered by unit address in ascending order.
52   Alternatively for some subarchitectures, nodes of the same type can be
53   grouped together, e.g. all I2C controllers one after another even if this
54   breaks unit address ordering.
55
562. Nodes without unit addresses shall be ordered alpha-numerically by the node
57   name.  For a few node types, they can be ordered by the main property, e.g.
58   pin configuration states ordered by value of "pins" property.
59
603. When extending nodes in the board DTS via &label, the entries shall be
61   ordered either alpha-numerically or by keeping the order from DTSI, where
62   the choice depends on the subarchitecture.
63
64The above-described ordering rules are easy to enforce during review, reduce
65chances of conflicts for simultaneous additions of new nodes to a file and help
66in navigating through the DTS source.
67
68Example::
69
70	/* SoC DTSI */
71
72	/ {
73		cpus {
74			/* ... */
75		};
76
77		psci {
78			/* ... */
79		};
80
81		soc@0 {
82			dma: dma-controller@10000 {
83				/* ... */
84			};
85
86			clk: clock-controller@80000 {
87				/* ... */
88			};
89		};
90	};
91
92	/* Board DTS - alphabetical order */
93
94	&clk {
95		/* ... */
96	};
97
98	&dma {
99		/* ... */
100	};
101
102	/* Board DTS - alternative order, keep as DTSI */
103
104	&dma {
105		/* ... */
106	};
107
108	&clk {
109		/* ... */
110	};
111
112Order of Properties in Device Node
113----------------------------------
114
115The following order of properties in device nodes is preferred:
116
1171. "compatible"
1182. "reg"
1193. "ranges"
1204. Standard/common properties (defined by common bindings, e.g. without
121   vendor-prefixes)
1225. Vendor-specific properties
1236. "status" (if applicable)
1247. Child nodes, where each node is preceded with a blank line
125
126The "status" property is by default "okay", thus it can be omitted.
127
128The above-described ordering follows this approach:
129
1301. Most important properties start the node: compatible then bus addressing to
131   match unit address.
1322. Each node will have common properties in similar place.
1333. Status is the last information to annotate that device node is or is not
134   finished (board resources are needed).
135
136Example::
137
138	/* SoC DTSI */
139
140	device_node: device-class@6789abc {
141		compatible = "vendor,device";
142		reg = <0x0 0x06789abc 0x0 0xa123>;
143		ranges = <0x0 0x0 0x06789abc 0x1000>;
144		#dma-cells = <1>;
145		clocks = <&clock_controller 0>, <&clock_controller 1>;
146		clock-names = "bus", "host";
147		#address-cells = <1>;
148		#size-cells = <1>;
149		vendor,custom-property = <2>;
150		status = "disabled";
151
152		child_node: child-class@100 {
153			reg = <0x100 0x200>;
154			/* ... */
155		};
156	};
157
158	/* Board DTS */
159
160	&device_node {
161		vdd-supply = <&board_vreg1>;
162		status = "okay";
163	}
164
165Indentation and wrapping
166------------------------
167
1681. Use indentation and wrap lines according to
169   Documentation/process/coding-style.rst.
1702. Each entry in arrays with multiple cells, e.g. "reg" with two IO addresses,
171   shall be enclosed in <>.
1723. For arrays spanning across lines, it is preferred to split on item boundary
173   and align the continued entries with opening < from the first line.
174   Usually avoid splitting individual items unless they significantly exceed
175   line wrap limit.
176
177Example::
178
179	thermal-sensor@c271000 {
180		compatible = "qcom,sm8550-tsens", "qcom,tsens-v2";
181		reg = <0x0 0x0c271000 0x0 0x1000>,
182		      <0x0 0x0c222000 0x0 0x1000>;
183		/* Lines exceeding coding style line wrap limit: */
184		interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
185				<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
186	};
187
188Organizing DTSI and DTS
189-----------------------
190
191The DTSI and DTS files shall be organized in a way representing the common,
192reusable parts of hardware.  Typically, this means organizing DTSI and DTS files
193into several files:
194
1951. DTSI with contents of the entire SoC, without nodes for hardware not present
196   on the SoC.
1972. If applicable: DTSI with common or re-usable parts of the hardware, e.g.
198   entire System-on-Module.
1993. DTS representing the board.
200
201Hardware components that are present on the board shall be placed in the
202board DTS, not in the SoC or SoM DTSI.  A partial exception is a common
203external reference SoC input clock, which could be coded as a fixed-clock in
204the SoC DTSI with its frequency provided by each board DTS.
205