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/linux-6.14.4/drivers/soc/qcom/
Dsmem.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
16 #include <linux/soc/qcom/smem.h>
38 * (@smem_ptable), that is found 4kB from the end of the main smem region. The
44 * two regions are cached and non-cached memory respectively. Each region
48 * Items in the non-cached region are allocated from the start of the partition
50 * is hence the region between the cached and non-cached offsets. The header of
55 * region with partition type (SMEM_GLOBAL_HOST) and the max smem item count is
59 * be held - currently lock number 3 of the sfpb or tcsr is used for this on all
65 * The version member of the smem header contains an array of versions for the
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 the low-power state for resources related to the remoteproc
26 resource on a RPM-hardened platform must use this database to get
84 and instances handled by the remote DSPs. This is a kernel-space
124 Say yes here to support USB-C and battery status on modern Qualcomm
147 purpose of exchanging sector-data between the remote filesystem
156 The RPM Master sleep stats driver provides detailed per-subsystem
158 assess whether all the low-power modes available are entered as
159 expected or to check which part of the SoC prevents it from sleeping.
164 tristate "Qualcomm RPM-Hardened (RPMH) Communication"
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/linux-6.14.4/Documentation/devicetree/bindings/mtd/partitions/
Dqcom,smem-part.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/partitions/qcom,smem-part.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SMEM NAND flash partition parser
10 - Manivannan Sadhasivam <[email protected]>
14 Memory (SMEM) based partition table scheme. The maximum partitions supported
22 const: qcom,smem-part
25 "^partition-[0-9a-z]+$":
26 $ref: nvmem-cells.yaml
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Dpartitions.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Miquel Raynal <[email protected]>
17 - $ref: arm,arm-firmware-suite.yaml
18 - $ref: brcm,bcm4908-partitions.yaml
19 - $ref: brcm,bcm947xx-cfe-partitions.yaml
20 - $ref: fixed-partitions.yaml
21 - $ref: linksys,ns-partitions.yaml
22 - $ref: qcom,smem-part.yaml
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/linux-6.14.4/drivers/mtd/parsers/
Dqcomsmempart.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm SMEM NAND flash partition parser
13 #include <linux/soc/qcom/smem.h>
28 * struct smem_flash_pentry - SMEM Flash partition entry
42 * struct smem_flash_ptable - SMEM Flash partition table
69 && mtd->type == MTD_NORFLASH) { in parse_qcomsmem_part()
70 pr_err("%s: SMEM partition parser is incompatible with 4K sectors\n", in parse_qcomsmem_part()
71 mtd->name); in parse_qcomsmem_part()
72 return -EINVAL; in parse_qcomsmem_part()
75 pr_debug("Parsing partition table info from SMEM\n"); in parse_qcomsmem_part()
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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dqcom,ipa.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alex Elder <[email protected]>
20 The GSI is an integral part of the IPA, but it is logically isolated
21 and has a distinct interrupt and a separately-defined address space.
28 - |
29 -------- ---------
31 | AP +<---. .----+ Modem |
32 | +--. | | .->+ |
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/linux-6.14.4/tools/testing/selftests/mm/
Dcow.c1 // SPDX-License-Identifier: GPL-2.0-only
102 for (; size; addr += pagesize, size -= pagesize) in range_is_swapped()
115 if (pipe(comm_pipes->child_ready) < 0) in setup_comm_pipes()
116 return -errno; in setup_comm_pipes()
117 if (pipe(comm_pipes->parent_ready) < 0) { in setup_comm_pipes()
118 close(comm_pipes->child_ready[0]); in setup_comm_pipes()
119 close(comm_pipes->child_ready[1]); in setup_comm_pipes()
120 return -errno; in setup_comm_pipes()
128 close(comm_pipes->child_ready[0]); in close_comm_pipes()
129 close(comm_pipes->child_ready[1]); in close_comm_pipes()
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/linux-6.14.4/drivers/cpufreq/
Dqcom-cpufreq-nvmem.c1 // SPDX-License-Identifier: GPL-2.0
10 * defines the voltage and frequency value based on the msm-id in SMEM
12 * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
15 * operating-points-v2 table when it is parsed by the OPP framework.
23 #include <linux/nvmem-consumer.h>
31 #include <linux/soc/qcom/smem.h>
33 #include <dt-bindings/arm/qcom,ids.h>
85 drv->versions = 1 << *speedbin; in qcom_cpufreq_simple_get_version()
142 /* 4 bits of PVS are in efuse register bits 31, 8-6. */ in get_krait_bin_format_b()
201 drv->versions = 1 << (unsigned int)(*speedbin); in qcom_cpufreq_kryo_name_version()
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/linux-6.14.4/drivers/net/ethernet/brocade/bna/
Dbfa_ioc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
21 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
23 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
24 #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
25 #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
27 ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
29 ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
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/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/fw/
Druntime.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
4 * Copyright (C) 2018-2024 Intel Corporation
9 #include "iwl-config.h"
10 #include "iwl-trans.h"
15 #include "iwl-nvm-utils.h"
45 * struct iwl_fwrt_dump_data - dump data
49 * Note that the decision which part of the union is used
50 * is based on iwl_trans_dbg_ini_valid(): the 'trig' part
51 * is used if it is %true, the 'desc' part otherwise.
68 * struct iwl_fwrt_wk_data - dump worker data struct
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Dfile.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */
56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */
118 /* TLVs 0x1000-0x2000 are for internal driver usage */
170 * enum iwl_ucode_tlv_flag - ucode API flags
206 * enum iwl_ucode_tlv_api - ucode api
304 * member due to its bitwise type) and kernel-doc (which doesn't understand
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/linux-6.14.4/drivers/net/ipa/
Dipa_data.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2024 Linaro Ltd.
18 * Boot-time configuration data is used to define the configuration of the
33 * with it, and each channel has an ID unique for that EE. For the most part
41 * together, establishing the endpoint_id->(EE, channel_id) mapping.
52 /** enum ipa_qsb_master_id - array index for IPA QSB configuration data */
59 * struct ipa_qsb_data - Qualcomm System Bus configuration data
62 * @max_reads_beats: Max outstanding read bytes in 8-byte "beats" (if non-zero)
71 * struct gsi_channel_data - GSI channel configuration data
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/linux-6.14.4/arch/mips/include/asm/octeon/
Dcvmx-address.h5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2009 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
76 /* send out a single-tick command on the NCB bus */
84 * Octeon-I HW never interprets this X (<39:36> reserved
87 * - 0x0 XXX0 0000 0000 to DRAM Cached
88 * - 0x0 XXX0 0FFF FFFF
90 * - 0x0 XXX0 1000 0000 to Boot Bus Uncached (Converted to 0x1 00X0 1000 0000
91 * - 0x0 XXX0 1FFF FFFF + EJTAG to 0x1 00X0 1FFF FFFF)
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/linux-6.14.4/drivers/remoteproc/
Dqcom_common.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
21 #include <linux/soc/qcom/smem.h>
39 * struct minidump_region - Minidump region
55 * struct minidump_subsystem - Subsystem's SMEM Table of content
73 * struct minidump_global_toc - Global Table of Content
99 list_for_each_entry_safe(entry, tmp, &rproc->dump_segments, node) { in qcom_minidump_cleanup()
100 list_del(&entry->node); in qcom_minidump_cleanup()
101 kfree(entry->priv); in qcom_minidump_cleanup()
117 if (WARN_ON(!list_empty(&rproc->dump_segments))) { in qcom_add_minidump_segments()
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/linux-6.14.4/drivers/scsi/bfa/
Dbfa_ioc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
31 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \
33 #define bfa_ioc_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->ioc_timer)
36 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->hb_timer, \
38 #define bfa_hb_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->hb_timer)
55 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
57 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
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/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/
Diwl-config.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 * Copyright (C) 2018-2024 Intel Corporation
15 #include "iwl-csr.h"
16 #include "iwl-drv.h"
61 * enum iwl_nvm_type - nvm formats
107 MODULE_FIRMWARE(pfx "-" __stringify(api) ".ucode"); \
118 * struct iwl_base_params - params not likely to change within a device family
123 * The detail algorithm is described in iwl-led.c
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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/linux-6.14.4/drivers/gpu/drm/xe/
Dxe_device_types.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright © 2022-2023 Intel Corporation
40 #define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
41 #define MEDIA_VER(xe) ((xe)->info.media_verx100 / 100)
42 #define GRAPHICS_VERx100(xe) ((xe)->info.graphics_verx100)
43 #define MEDIA_VERx100(xe) ((xe)->info.media_verx100)
44 #define IS_DGFX(xe) ((xe)->info.is_dgfx)
55 ((_xe)->info.platform == (_platform) && \
56 (_xe)->info.step.graphics >= (min_step) && \
57 (_xe)->info.step.graphics < (max_step))
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Dxe_pt.c1 // SPDX-License-Identifier: MIT
6 #include <linux/dma-fence-array.h>
29 /** @children: Array of page-table child nodes */
31 /** @staging: Array of page-table staging nodes */
36 #define xe_pt_set_addr(__xe_pt, __addr) ((__xe_pt)->addr = (__addr))
37 #define xe_pt_addr(__xe_pt) ((__xe_pt)->addr)
46 #define XE_PT_HIGHEST_LEVEL (ARRAY_SIZE(xe_normal_pt_shifts) - 1)
56 return container_of(pt_dir->staging[index], struct xe_pt, base); in xe_pt_entry_staging()
63 u16 pat_index = xe->pat.idx[XE_CACHE_WB]; in __xe_pt_empty_pte()
64 u8 id = tile->id; in __xe_pt_empty_pte()
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/linux-6.14.4/drivers/gpu/drm/i915/gt/uc/
Dintel_guc.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2014-2019 Intel Corporation
28 * - Authentication of the HuC, which is required to fully enable HuC usage.
29 * - Low latency graphics context scheduling (a.k.a. GuC submission).
30 * - GT Power management.
52 intel_uncore_write(gt->uncore, guc->notify_reg, GUC_SEND_TRIGGER); in intel_guc_notify()
57 GEM_BUG_ON(!guc->send_regs.base); in guc_send_reg()
58 GEM_BUG_ON(!guc->send_regs.count); in guc_send_reg()
59 GEM_BUG_ON(i >= guc->send_regs.count); in guc_send_reg()
61 return _MMIO(guc->send_regs.base + 4 * i); in guc_send_reg()
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/linux-6.14.4/drivers/video/fbdev/
Dpm2fb.c8 * Copyright (c) 1998-2000 Ilario Nardinocchi ([email protected])
14 * I have a Creative Graphics Blaster Exxtreme card - pm2fb on x86. I
16 * hopefully other big-endian) devices now work, thanks to a lot of
71 * support on TVP4010 and similar where there is no RAMDAC - see
74 * fixed-frequency monitor which absolutely has to have -ve sync. So
76 * should be silently turned in -ve sync.
84 * The hardware state of the graphics card that isn't part of the
128 .height = -1,
129 .width = -1,
147 return fb_readl(p->v_regs + off); in pm2_RD()
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Dtdfxfb.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * I2C part copied from the i2c-voodoo3.c driver by:
17 * Ralph Metzler <[email protected]-koeln.de>, and
45 * - multihead support (basically need to support an array of fb_infos)
46 * - support other architectures (PPC, Alpha); does the fact that the VGA
52 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
54 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
60 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
62 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
63 * 0.1.0 (released 1999-10-06) initial version
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/linux-6.14.4/drivers/gpu/drm/i915/gem/
Di915_gem_mman.c2 * SPDX-License-Identifier: MIT
4 * Copyright © 2014-2016 Intel Corporation
33 if (vma->vm_file != filp) in __vma_matches()
36 return vma->vm_start == addr && in __vma_matches()
37 (vma->vm_end - vma->vm_start) == PAGE_ALIGN(size); in __vma_matches()
41 * i915_gem_mmap_ioctl - Maps the contents of an object, returning the address
74 return -EOPNOTSUPP; in i915_gem_mmap_ioctl()
76 if (args->flags & ~(I915_MMAP_WC)) in i915_gem_mmap_ioctl()
77 return -EINVAL; in i915_gem_mmap_ioctl()
79 if (args->flags & I915_MMAP_WC && !pat_enabled()) in i915_gem_mmap_ioctl()
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