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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dti,dp83822.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <[email protected]>
14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16 data over standard, twisted-pair cables or to connect to an external,
17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
18 connect to a MAC through a standard MII, RMII, or RGMII interface
24 - $ref: ethernet-phy.yaml#
30 ti,link-loss-low:
[all …]
Dmediatek-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biao Huang <[email protected]>
21 - mediatek,mt2712-gmac
22 - mediatek,mt8188-gmac
23 - mediatek,mt8195-gmac
25 - compatible
28 - $ref: snps,dwmac.yaml#
[all …]
Dsti-dwmac.txt10 - compatible : "st,stih407-dwmac"
11 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
13 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
15 - pinctrl-0: pin-control for all the MII mode supported.
18 - resets : phandle pointing to the system reset controller with correct
20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
22 - st,tx-retime-src: This specifies which clk is wired up to the mac for
25 If not passed, the internal clock will be used by default.
26 - sti-ethclk: this is the phy clock.
27 - sti-clkconf: this is an extra sysconfig register, available in new SoCs,
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/net/dsa/
Dmicrochip,ksz.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <[email protected]>
11 - Woojung Huh <[email protected]>
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 - microchip,ksz8765
22 - microchip,ksz8794
23 - microchip,ksz8795
24 - microchip,ksz8863
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/linux-6.14.4/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-meson8b.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
51 * internal sampling) or enable (= 1) the internal logic for RXEN and RXD[3:0]
60 /* An internal counter based on the "timing-adjustment" clock. The counter is
94 struct clk *rgmii_tx_clk;
97 struct clk *timing_adj_clk;
112 data = readl(dwmac->regs + reg); in meson8b_dwmac_mask_bits()
116 writel(data, dwmac->regs + reg); in meson8b_dwmac_mask_bits()
119 static struct clk *meson8b_dwmac_register_clk(struct meson8b_dwmac *dwmac, in meson8b_dwmac_register_clk()
[all …]
Ddwmac-mediatek.c1 // SPDX-License-Identifier: GPL-2.0
79 struct clk *rmii_internal_clk;
114 int rmii_clk_from_mac = plat->rmii_clk_from_mac ? RMII_CLK_SRC_INTERNAL : 0; in mt2712_set_interface()
115 int rmii_rxc = plat->rmii_rxc ? RMII_CLK_SRC_RXC : 0; in mt2712_set_interface()
119 switch (plat->phy_mode) { in mt2712_set_interface()
133 dev_err(plat->dev, "phy interface not supported\n"); in mt2712_set_interface()
134 return -EINVAL; in mt2712_set_interface()
137 regmap_write(plat->peri_regmap, PERI_ETH_PHY_INTF_SEL, intf_val); in mt2712_set_interface()
144 struct mac_delay_struct *mac_delay = &plat->mac_delay; in mt2712_delay_ps2stage()
146 switch (plat->phy_mode) { in mt2712_delay_ps2stage()
[all …]
Ddwmac-sti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sti.c - STMicroelectronics DWMAC Specific Glue layer
5 * Copyright (C) 2003-2014 STMicroelectronics (R&D) Limited
18 #include <linux/clk.h>
40 * ------------------------------------------------
43 * ------------------------------------------------
45 *| | clk-125/txclk | txclk |
46 * ------------------------------------------------
48 *| | clk-125/txclk | clkgen |
50 * ------------------------------------------------
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Ddwmac-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
9 #include <linux/clk.h>
37 *------------------------------------------
39 *------------------------------------------
41 *------------------------------------------
43 *------------------------------------------
45 *------------------------------------------
46 * RMII | 1 | 0 | 0 | n/a |
47 *------------------------------------------
[all …]
Ddwmac-sun8i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer
8 #include <linux/clk.h>
11 #include <linux/mdio-mux.h>
28 /* General notes on dwmac-sun8i:
33 /* struct emac_variant - Describe dwmac-sun8i hardware variant
39 * @soc_has_internal_phy: Does the MAC embed an internal PHY
41 * @support_rmii: Does the MAC handle RMII
61 /* struct sunxi_priv_data - hold all sunxi private data
62 * @ephy_clk: reference to the optional EPHY clock for the internal PHY
[all …]
/linux-6.14.4/arch/arm64/boot/dts/amlogic/
Dmeson-gxl-s905w-jethome-jethub-j80.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-gxl.dtsi"
15 compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl";
22 reserved-memory {
37 stdout-path = "serial0:115200n8";
40 vddio_ao18: regulator-vddio-ao18 {
41 compatible = "regulator-fixed";
42 regulator-name = "VDDIO_AO18";
43 regulator-min-microvolt = <1800000>;
[all …]
Dmeson-axg-jethome-jethub-j1xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-axg.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/thermal/thermal.h>
24 stdout-path = "serial0:115200n8";
27 reserved-memory {
33 emmc_pwrseq: emmc-pwrseq {
34 compatible = "mmc-pwrseq-emmc";
35 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
[all …]
Dmeson-g12a-sei510.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
Dmeson-sm1-sei610.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-sm1.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
23 mono_dac: audio-codec-0 {
25 #sound-dai-cells = <0>;
26 sound-name-prefix = "U16";
[all …]
Dmeson-g12a-u200.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
12 #include <dt-bindings/sound/meson-g12a-toacodec.h>
23 dioo2133: audio-amplifier-0 {
24 compatible = "simple-audio-amplifier";
25 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
[all …]
/linux-6.14.4/drivers/net/phy/
Ddp83822.c1 // SPDX-License-Identifier: GPL-2.0
205 struct net_device *ndev = phydev->attached_dev; in dp83822_config_wol()
209 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) { in dp83822_config_wol()
210 mac = (const u8 *)ndev->dev_addr; in dp83822_config_wol()
213 return -EINVAL; in dp83822_config_wol()
227 if (wol->wolopts & WAKE_MAGIC) in dp83822_config_wol()
232 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83822_config_wol()
235 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83822_config_wol()
238 (wol->sopass[3] << 8) | wol->sopass[2]); in dp83822_config_wol()
241 (wol->sopass[5] << 8) | wol->sopass[4]); in dp83822_config_wol()
[all …]
Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
29 #include <linux/clk.h>
126 * The value is calculated as following: (1/1000000)/((2^-32)/4)
132 * The value is calculated as following: (1/1000000)/((2^-32)/8)
435 struct clk *clk; member
527 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
531 if (type && type->interrupt_level_mask) in kszphy_config_intr()
532 mask = type->interrupt_level_mask; in kszphy_config_intr()
544 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr()
[all …]
/linux-6.14.4/drivers/net/ethernet/actions/
Dowl-emac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/clk.h>
11 #include <linux/dma-mapping.h>
19 #include "owl-emac.h"
27 return readl(priv->base + reg); in owl_emac_reg_read()
32 writel(data, priv->base + reg); in owl_emac_reg_write()
63 return priv->netdev->dev.parent; in owl_emac_get_dev()
129 return dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); in owl_emac_dma_map_tx()
142 return CIRC_SPACE(ring->head, ring->tail, ring->size); in owl_emac_ring_num_unused()
148 return (cur + 1) & (ring->size - 1); in owl_emac_ring_get_next()
[all …]
/linux-6.14.4/Documentation/networking/device_drivers/ethernet/stmicro/
Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
[all …]
/linux-6.14.4/arch/mips/boot/dts/img/
Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
/linux-6.14.4/arch/sh/boards/mach-ecovec24/
Dsetup.c1 // SPDX-License-Identifier: GPL-2.0
39 #include <linux/dma-map-ops.h>
41 #include <media/drv-intf/renesas-ceu.h>
52 *-----------------------------------------
56 * 0x0400_0000 Internal I/O 16/32bit
62 *------------------------------
65 * DS2[2] = RMII / TS, SCIF ON : RMII
71 * DS2[6-7] = MMC / SD ON-OFF : SD
72 * OFF-ON : MMC
76 * FSI - DA7210
[all …]
/linux-6.14.4/arch/arm/boot/dts/st/
Dstm32mp135f-dk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
15 #include "stm32mp13-pinctrl.dtsi"
18 model = "STMicroelectronics STM32MP135F-DK Discovery Board";
19 compatible = "st,stm32mp135f-dk", "st,stm32mp135";
[all …]
/linux-6.14.4/arch/arm/boot/dts/rockchip/
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
/linux-6.14.4/arch/powerpc/include/asm/
Dcpm2.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * All CPM control and status is available through the CPM2 internal
27 /* Device sub-block and page codes.
72 /* CPM2-specific opcodes (see cpm.h for common opcodes)
106 extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src);
153 * get some microcode patches :-).
154 * The parameter ram space for the SMCs is fifty-some bytes, and
169 uint smc_rstate; /* Internal */
170 uint smc_idp; /* Internal */
171 ushort smc_rbptr; /* Internal */
[all …]
/linux-6.14.4/drivers/net/ethernet/cadence/
Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
25 #include <linux/dma-mapping.h>
40 #include <linux/firmware/xlnx-zynqmp.h>
58 * (bp)->rx_ring_size)
64 * (bp)->tx_ring_size)
67 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
78 …MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN -…
[all …]
/linux-6.14.4/drivers/net/ethernet/ti/
Ddavinci_emac.c1 // SPDX-License-Identifier: GPL-2.0+
9 * ---------------------------------------------------------------------------
11 * 0-5 A number of folks worked on this driver in bits and pieces but the major
13 * 6.0 Anant Gole - rewrote the driver as per Linux conventions
14 * 6.1 Chaithrika U S - added support for Gigabit and RMII features,
38 #include <linux/dma-mapping.h>
39 #include <linux/clk.h>
117 #define EMAC_DEF_RX_MAX_SERVICE (64) /* should = netdev->weight */
320 u32 speed; /* 0=Auto Neg, 1=No PHY, 10,100, 1000 - mbps */
358 #define emac_read(reg) ioread32(priv->emac_base + (reg))
[all …]

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