Lines Matching +full:rmii +full:- +full:clk +full:- +full:internal
1 // SPDX-License-Identifier: GPL-2.0
205 struct net_device *ndev = phydev->attached_dev; in dp83822_config_wol()
209 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) { in dp83822_config_wol()
210 mac = (const u8 *)ndev->dev_addr; in dp83822_config_wol()
213 return -EINVAL; in dp83822_config_wol()
227 if (wol->wolopts & WAKE_MAGIC) in dp83822_config_wol()
232 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83822_config_wol()
235 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83822_config_wol()
238 (wol->sopass[3] << 8) | wol->sopass[2]); in dp83822_config_wol()
241 (wol->sopass[5] << 8) | wol->sopass[4]); in dp83822_config_wol()
267 struct dp83822_private *dp83822 = phydev->priv; in dp83822_set_wol()
272 memcpy(&dp83822->wol, wol, sizeof(*wol)); in dp83822_set_wol()
282 wol->supported = (WAKE_MAGIC | WAKE_MAGICSECURE); in dp83822_get_wol()
283 wol->wolopts = 0; in dp83822_get_wol()
288 wol->wolopts |= WAKE_MAGIC; in dp83822_get_wol()
293 wol->sopass[0] = (sopass_val & 0xff); in dp83822_get_wol()
294 wol->sopass[1] = (sopass_val >> 8); in dp83822_get_wol()
298 wol->sopass[2] = (sopass_val & 0xff); in dp83822_get_wol()
299 wol->sopass[3] = (sopass_val >> 8); in dp83822_get_wol()
303 wol->sopass[4] = (sopass_val & 0xff); in dp83822_get_wol()
304 wol->sopass[5] = (sopass_val >> 8); in dp83822_get_wol()
306 wol->wolopts |= WAKE_MAGICSECURE; in dp83822_get_wol()
311 wol->wolopts = 0; in dp83822_get_wol()
316 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_intr()
321 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83822_config_intr()
330 if (!dp83822->fx_enabled) in dp83822_config_intr()
350 if (!dp83822->fx_enabled) in dp83822_config_intr()
421 struct dp83822_private *dp83822 = phydev->priv; in dp83822_read_status()
426 if (dp83822->fx_enabled) { in dp83822_read_status()
428 phydev->speed = SPEED_UNKNOWN; in dp83822_read_status()
429 phydev->duplex = DUPLEX_UNKNOWN; in dp83822_read_status()
452 phydev->duplex = DUPLEX_FULL; in dp83822_read_status()
454 phydev->duplex = DUPLEX_HALF; in dp83822_read_status()
457 phydev->speed = SPEED_10; in dp83822_read_status()
459 phydev->speed = SPEED_100; in dp83822_read_status()
466 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_init_leds()
469 if (dp83822->led_pin_enable[DP83822_LED_INDEX_LED_0]) { in dp83822_config_init_leds()
476 } else if (dp83822->led_pin_enable[DP83822_LED_INDEX_COL_GPIO2]) { in dp83822_config_init_leds()
485 if (dp83822->led_pin_enable[DP83822_LED_INDEX_LED_1_GPIO1]) { in dp83822_config_init_leds()
494 if (dp83822->led_pin_enable[DP83822_LED_INDEX_RX_D3_GPIO3]) { in dp83822_config_init_leds()
508 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_init()
509 struct device *dev = &phydev->mdio.dev; in dp83822_config_init()
516 if (dp83822->set_gpio2_clk_out) in dp83822_config_init()
523 dp83822->gpio2_clk_out)); in dp83822_config_init()
533 /* Set DP83822_RX_CLK_SHIFT to enable rx clk internal delay */ in dp83822_config_init()
540 /* Set DP83822_TX_CLK_SHIFT to disable tx clk internal delay */ in dp83822_config_init()
562 if (dp83822->fx_enabled) { in dp83822_config_init()
569 linkmode_and(phydev->advertising, phydev->advertising, in dp83822_config_init()
570 phydev->supported); in dp83822_config_init()
573 phydev->supported); in dp83822_config_init()
575 phydev->advertising); in dp83822_config_init()
577 phydev->supported); in dp83822_config_init()
579 phydev->supported); in dp83822_config_init()
581 phydev->advertising); in dp83822_config_init()
583 phydev->advertising); in dp83822_config_init()
595 phydev->autoneg = AUTONEG_DISABLE; in dp83822_config_init()
597 phydev->supported); in dp83822_config_init()
599 phydev->advertising); in dp83822_config_init()
609 if (dp83822->fx_signal_det_low) { in dp83822_config_init()
617 return dp83822_config_wol(phydev, &dp83822->wol); in dp83822_config_init()
622 struct device *dev = &phydev->mdio.dev; in dp8382x_config_rmii_mode()
626 if (!device_property_read_string(dev, "ti,rmii-mode", &of_val)) { in dp8382x_config_rmii_mode()
634 phydev_err(phydev, "Invalid value for ti,rmii-mode property (%s)\n", in dp8382x_config_rmii_mode()
636 ret = -EINVAL; in dp8382x_config_rmii_mode()
648 struct dp83822_private *dp83822 = phydev->priv; in dp83826_config_init()
652 if (phydev->interface == PHY_INTERFACE_MODE_RMII) { in dp83826_config_init()
668 if (dp83822->cfg_dac_minus != DP83826_CFG_DAC_MINUS_DEFAULT) { in dp83826_config_init()
669 val = FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDI_MASK, dp83822->cfg_dac_minus) | in dp83826_config_init()
672 dp83822->cfg_dac_minus)); in dp83826_config_init()
680 dp83822->cfg_dac_minus)); in dp83826_config_init()
687 if (dp83822->cfg_dac_plus != DP83826_CFG_DAC_PLUS_DEFAULT) { in dp83826_config_init()
688 val = FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDIX_MASK, dp83822->cfg_dac_plus) | in dp83826_config_init()
689 FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDI_MASK, dp83822->cfg_dac_plus); in dp83826_config_init()
696 return dp83822_config_wol(phydev, &dp83822->wol); in dp83826_config_init()
701 struct dp83822_private *dp83822 = phydev->priv; in dp83825_config_init()
708 return dp83822_config_wol(phydev, &dp83822->wol); in dp83825_config_init()
719 return phydev->drv->config_init(phydev); in dp83822_phy_reset()
725 struct device_node *node = phydev->mdio.dev.of_node; in dp83822_of_init_leds()
726 struct dp83822_private *dp83822 = phydev->priv; in dp83822_of_init_leds()
746 dp83822->led_pin_enable[index] = true; in dp83822_of_init_leds()
749 return -EINVAL; in dp83822_of_init_leds()
757 if (dp83822->led_pin_enable[DP83822_LED_INDEX_LED_0] && in dp83822_of_init_leds()
758 dp83822->led_pin_enable[DP83822_LED_INDEX_COL_GPIO2]) { in dp83822_of_init_leds()
760 return -EINVAL; in dp83822_of_init_leds()
763 if (dp83822->led_pin_enable[DP83822_LED_INDEX_COL_GPIO2] && in dp83822_of_init_leds()
764 dp83822->set_gpio2_clk_out) { in dp83822_of_init_leds()
766 return -EINVAL; in dp83822_of_init_leds()
769 if (dp83822->led_pin_enable[DP83822_LED_INDEX_RX_D3_GPIO3] && in dp83822_of_init_leds()
770 phydev->interface != PHY_INTERFACE_MODE_RMII) { in dp83822_of_init_leds()
771 phydev_err(phydev, "RX_D3 can only be used as LED output when in RMII mode\n"); in dp83822_of_init_leds()
772 return -EINVAL; in dp83822_of_init_leds()
780 struct dp83822_private *dp83822 = phydev->priv; in dp83822_of_init()
781 struct device *dev = &phydev->mdio.dev; in dp83822_of_init()
788 if (dp83822->fx_enabled && dp83822->fx_sd_enable) in dp83822_of_init()
789 dp83822->fx_signal_det_low = device_property_present(dev, in dp83822_of_init()
790 "ti,link-loss-low"); in dp83822_of_init()
791 if (!dp83822->fx_enabled) in dp83822_of_init()
792 dp83822->fx_enabled = device_property_present(dev, in dp83822_of_init()
793 "ti,fiber-mode"); in dp83822_of_init()
795 if (!device_property_read_string(dev, "ti,gpio2-clk-out", &of_val)) { in dp83822_of_init()
796 if (strcmp(of_val, "mac-if") == 0) { in dp83822_of_init()
797 dp83822->gpio2_clk_out = DP83822_CLK_SRC_MAC_IF; in dp83822_of_init()
799 dp83822->gpio2_clk_out = DP83822_CLK_SRC_XI; in dp83822_of_init()
800 } else if (strcmp(of_val, "int-ref") == 0) { in dp83822_of_init()
801 dp83822->gpio2_clk_out = DP83822_CLK_SRC_INT_REF; in dp83822_of_init()
802 } else if (strcmp(of_val, "rmii-master-mode-ref") == 0) { in dp83822_of_init()
803 dp83822->gpio2_clk_out = DP83822_CLK_SRC_RMII_MASTER_MODE_REF; in dp83822_of_init()
804 } else if (strcmp(of_val, "free-running") == 0) { in dp83822_of_init()
805 dp83822->gpio2_clk_out = DP83822_CLK_SRC_FREE_RUNNING; in dp83822_of_init()
807 dp83822->gpio2_clk_out = DP83822_CLK_SRC_RECOVERED; in dp83822_of_init()
810 "Invalid value for ti,gpio2-clk-out property (%s)\n", in dp83822_of_init()
812 return -EINVAL; in dp83822_of_init()
815 dp83822->set_gpio2_clk_out = true; in dp83822_of_init()
823 int tmp = DP83826_CFG_DAC_PERCENT_DEFAULT - percent; in dp83826_to_dac_minus_one_regval()
830 int tmp = percent - DP83826_CFG_DAC_PERCENT_DEFAULT; in dp83826_to_dac_plus_one_regval()
837 struct dp83822_private *dp83822 = phydev->priv; in dp83826_of_init()
838 struct device *dev = &phydev->mdio.dev; in dp83826_of_init()
841 dp83822->cfg_dac_minus = DP83826_CFG_DAC_MINUS_DEFAULT; in dp83826_of_init()
842 if (!device_property_read_u32(dev, "ti,cfg-dac-minus-one-bp", &val)) in dp83826_of_init()
843 dp83822->cfg_dac_minus += dp83826_to_dac_minus_one_regval(val); in dp83826_of_init()
845 dp83822->cfg_dac_plus = DP83826_CFG_DAC_PLUS_DEFAULT; in dp83826_of_init()
846 if (!device_property_read_u32(dev, "ti,cfg-dac-plus-one-bp", &val)) in dp83826_of_init()
847 dp83822->cfg_dac_plus += dp83826_to_dac_plus_one_regval(val); in dp83826_of_init()
862 struct dp83822_private *dp83822 = phydev->priv; in dp83822_read_straps()
875 dp83822->fx_enabled = 1; in dp83822_read_straps()
877 if (dp83822->fx_enabled) { in dp83822_read_straps()
881 dp83822->fx_sd_enable = 1; in dp83822_read_straps()
891 dp83822 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83822), in dp8382x_probe()
894 return -ENOMEM; in dp8382x_probe()
896 phydev->priv = dp83822; in dp8382x_probe()
910 dp83822 = phydev->priv; in dp83822_probe()
920 if (dp83822->fx_enabled) in dp83822_probe()
921 phydev->port = PORT_FIBRE; in dp83822_probe()
987 return -EOPNOTSUPP; in dp83822_led_mode()