Searched +full:pull +full:- +full:down +full:- +full:strength (Results 1 – 25 of 352) sorted by relevance
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/linux-6.14.4/arch/arm64/boot/dts/rockchip/ |
D | rockchip-pinconf.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /omit-if-no-ref/ 8 pcfg_pull_up: pcfg-pull-up { 9 bias-pull-up; 12 /omit-if-no-ref/ 13 pcfg_pull_down: pcfg-pull-down { 14 bias-pull-down; 17 /omit-if-no-ref/ 18 pcfg_pull_none: pcfg-pull-none { 19 bias-disable; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/ |
D | nvidia,tegra20-sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <[email protected]> 11 - Jon Hunter <[email protected]> 18 mmc-controller.yaml and the properties for the Tegra SDHCI controller. 23 - enum: 24 - nvidia,tegra20-sdhci 25 - nvidia,tegra30-sdhci [all …]
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/linux-6.14.4/arch/arm/boot/dts/qcom/ |
D | qcom-mdm9615-wp8548.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 9 #include "qcom-mdm9615.dtsi" 23 pinctrl-0 = <&reset_out_pins>; 24 pinctrl-names = "default"; 26 gsbi3_pins: gsbi3-state { 27 gsbi3-pins { 30 drive-strength = <8>; 31 bias-disable; 35 gsbi4_pins: gsbi4-state { 36 gsbi4-pins { [all …]
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D | qcom-apq8060-dragonboard.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/leds/common.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 7 #include "qcom-msm8660.dtsi" 12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 19 stdout-path = "serial0:115200n8"; 23 vph: regulator-fixed { [all …]
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D | qcom-msm8960-samsung-expressatt.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 5 #include "qcom-msm8960.dtsi" 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 9 #include <dt-bindings/input/gpio-keys.h> 12 model = "Samsung Galaxy Express SGH-I437"; 14 chassis-type = "handset"; 23 stdout-path = "serial0:115200n8"; [all …]
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D | qcom-apq8064-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 sdcc1_default_state: sdcc1-default-state { 5 clk-pins { 7 drive-strength = <16>; 8 bias-disable; 11 cmd-pins { 13 drive-strength = <10>; 14 bias-pull-up; 17 data-pins { 19 drive-strength = <10>; [all …]
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D | qcom-apq8064-sony-xperia-lagan-yuga.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/gpio/gpio.h> 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/mfd/qcom-rpm.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 7 #include "qcom-apq8064-v2.0.dtsi" 13 compatible = "sony,xperia-yuga", "qcom,apq8064"; 14 chassis-type = "handset"; 21 stdout-path = "serial0:115200n8"; 24 gpio-keys { [all …]
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D | qcom-msm8960-cdp.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 4 #include "qcom-msm8960.dtsi" 9 compatible = "qcom,msm8960-cdp", "qcom,msm8960"; 16 stdout-path = "serial0:115200n8"; 19 ext_l2: gpio-regulator { 20 compatible = "regulator-fixed"; 21 regulator-name = "ext_l2"; 23 startup-delay-us = <10000>; 24 enable-active-high; [all …]
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/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | ipq9574-rdp433.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include "ipq9574-rdp-common.dtsi" 15 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7"; 16 compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574"; 24 pinctrl-0 = <&pcie1_default>; 25 pinctrl-names = "default"; 27 perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; [all …]
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D | sc7180-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 14 #include "sc7180-firmware-tfa.dtsi" 20 compatible = "qcom,sc7180-idp", "qcom,sc7180"; 30 stdout-path = "serial0:115200n8"; 42 /delete-node/ &hyp_mem; 43 /delete-node/ &xbl_mem; [all …]
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D | sc7280-idp.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 9 #include <dt-bindings/input/linux-event-codes.h> 15 #include "sc7280-chrome-common.dtsi" 16 #include "sc7280-herobrine-lte-sku.dtsi" 25 max98360a: audio-codec-0 { 27 pinctrl-names = "default"; 28 pinctrl-0 = <&_en>; 29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; 30 #sound-dai-cells = <0>; [all …]
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D | sc7180-trogdor.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include <dt-bindings/sound/sc7180-lpass.h> 16 #include "sc7180-firmware-tfa.dtsi" 22 thermal-zones { 23 charger_thermal: charger-thermal { [all …]
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D | msm8998-xiaomi-sagit.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi 10 /dts-v1/; 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/leds/common.h> 18 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 24 /delete-node/ &adsp_mem; 25 /delete-node/ &mpss_mem; 26 /delete-node/ &venus_mem; 27 /delete-node/ &mba_mem; [all …]
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D | ipq5424-rdp466.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 8 /dts-v1/; 14 compatible = "qcom,ipq5424-rdp466", "qcom,ipq5424"; 20 vreg_misc_3p3: regulator-usb-3p3 { 21 compatible = "regulator-fixed"; 22 regulator-min-microvolt = <3300000>; 23 regulator-max-microvolt = <3300000>; 24 regulator-boot-on; 25 regulator-always-on; 26 regulator-name = "usb_hs_vdda_3p3"; [all …]
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/linux-6.14.4/arch/arm64/boot/dts/mediatek/ |
D | mt7986a-bananapi-bpi-r3-mini.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Authors: Frank Wunderlich <frank-w@public-files.de> 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/pinctrl/mt65xx.h> 19 model = "Bananapi BPI-R3 Mini"; 20 chassis-type = "embedded"; 21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a"; [all …]
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D | mt7986a-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/pinctrl/mt65xx.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; 22 stdout-path = "serial0:115200n8"; 30 reg_1p8v: regulator-1p8v { 31 compatible = "regulator-fixed"; 32 regulator-name = "fixed-1.8V"; 33 regulator-min-microvolt = <1800000>; [all …]
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D | mt8365-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2021-2022 BayLibre, SAS. 10 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/pinctrl/mt8365-pinfunc.h> 20 compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; 28 stdout-path = "serial0:921600n8"; 33 compatible = "linaro,optee-tz"; 38 gpio-keys { [all …]
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D | mt7986a-bananapi-bpi-r3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Frank Wunderlich <frank-w@public-files.de> 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/pinctrl/mt65xx.h> 18 model = "Bananapi BPI-R3"; 19 chassis-type = "embedded"; 20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; [all …]
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D | mt8183-pumpkin.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; 28 stdout-path = "serial0:921600n8"; 31 reserved-memory { 32 #address-cells = <2>; 33 #size-cells = <2>; 36 scp_mem_reserved: scp-mem@50000000 { [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
D | mediatek,mt8365-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Zhiyong Tao <[email protected]> 11 - Bernhard Rosenkränzer <[email protected]> 18 const: mediatek,mt8365-pinctrl 23 mediatek,pctl-regmap: 24 $ref: /schemas/types.yaml#/definitions/phandle-array 32 gpio-controller: true [all …]
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D | mediatek,mt8188-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hui Liu <[email protected]> 17 const: mediatek,mt8188-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 25 are defined in <dt-bindings/gpio/gpio.h>. 28 gpio-ranges: [all …]
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D | mediatek,mt8186-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <[email protected]> 17 const: mediatek,mt8186-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: 31 gpio-line-names: true [all …]
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D | mediatek,mt8195-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <[email protected]> 17 const: mediatek,mt8195-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: 32 gpio-line-names: true [all …]
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D | mediatek,mt8183-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <[email protected]> 17 const: mediatek,mt8183-pinctrl 23 reg-names: 25 - const: iocfg0 26 - const: iocfg1 27 - const: iocfg2 [all …]
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D | thead,th1520-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: T-Head TH1520 SoC pin controller 10 - Emil Renner Berthing <[email protected]> 13 Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC. 17 PADCTRL_AOSYS -> PAD Group 1 18 PADCTRL1_APSYS -> PAD Group 2 19 PADCTRL0_APSYS -> PAD Group 3 [all …]
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