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/linux-6.14.4/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,wdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
24 - enum:
25 - mediatek,mt8173-disp-wdma
26 - items:
27 - const: mediatek,mt6795-disp-wdma
28 - const: mediatek,mt8173-disp-wdma
[all …]
Dmediatek,split.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
24 - enum:
25 - mediatek,mt8173-disp-split
26 - mediatek,mt8195-mdp3-split
27 - items:
28 - const: mediatek,mt6795-disp-split
[all …]
Dmediatek,rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
15 data into DMA. It provides real time data to the back-end panel
26 - enum:
27 - mediatek,mt2701-disp-rdma
28 - mediatek,mt8173-disp-rdma
29 - mediatek,mt8183-disp-rdma
[all …]
Dmediatek,ovl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
24 - enum:
25 - mediatek,mt2701-disp-ovl
26 - mediatek,mt8173-disp-ovl
27 - mediatek,mt8183-disp-ovl
28 - mediatek,mt8192-disp-ovl
[all …]
Dmediatek,color.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
25 - enum:
26 - mediatek,mt2701-disp-color
27 - mediatek,mt8167-disp-color
28 - mediatek,mt8173-disp-color
29 - mediatek,mt8195-mdp3-color
[all …]
Dmediatek,gamma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
24 - enum:
25 - mediatek,mt8173-disp-gamma
26 - mediatek,mt8183-disp-gamma
27 - mediatek,mt8195-disp-gamma
28 - items:
[all …]
Dmediatek,aal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
24 - enum:
25 - mediatek,mt8173-disp-aal
26 - mediatek,mt8183-disp-aal
27 - mediatek,mt8195-mdp3-aal
28 - items:
[all …]
Dmediatek,merge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line
15 inputs into one side-by-side output.
24 - enum:
25 - mediatek,mt8173-disp-merge
26 - mediatek,mt8195-disp-merge
[all …]
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mt8173-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/memory/mt8173-larb-port.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/mt8173-power.h>
13 #include <dt-bindings/reset/mt8173-resets.h>
14 #include <dt-bindings/gce/mt8173-gce.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
Dmt6795.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
12 #include <dt-bindings/gce/mediatek,mt6795-gce.h>
13 #include <dt-bindings/memory/mt6795-larb-port.h>
14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
15 #include <dt-bindings/power/mt6795-power.h>
16 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
20 interrupt-parent = <&sysirq>;
[all …]
Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
[all …]
Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
[all …]
Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-[email protected]>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
[all …]
Dmt8188.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h>
12 #include <dt-bindings/memory/mediatek,mt8188-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
15 #include <dt-bindings/power/mediatek,mt8188-power.h>
[all …]
Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/soc/mediatek/
Dmediatek,mutex.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <[email protected]>
11 - Philipp Zabel <[email protected]>
15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
27 - mediatek,mt2701-disp-mutex
28 - mediatek,mt2712-disp-mutex
29 - mediatek,mt6795-disp-mutex
30 - mediatek,mt8167-disp-mutex
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/mailbox/
Dmediatek,gce-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Houlong Wei <[email protected]>
13 The Global Command Engine (GCE) is used to help read/write registers with
15 vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
20 - enum:
21 - mediatek,mt6779-gce
22 - mediatek,mt8173-gce
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mmsys.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <[email protected]>
18 pattern: "^syscon@[0-9a-f]+$"
22 - items:
23 - enum:
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
[all …]
/linux-6.14.4/drivers/mailbox/
Dmtk-cmdq-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
8 #include <linux/dma-mapping.h>
18 #include <linux/mailbox/mtk-cmdq-mailbox.h>
24 #define CMDQ_NUM_CMD(t) (t->cmd_buf_size / CMDQ_INST_SIZE)
97 WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks)); in cmdq_sw_ddr_enable()
100 writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable()
102 writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable()
104 clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks); in cmdq_sw_ddr_enable()
109 struct cmdq *cmdq = container_of(chan->mbox, struct cmdq, mbox); in cmdq_get_shift_pa()
[all …]
/linux-6.14.4/drivers/gpu/drm/mediatek/
Dmtk_disp_color.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/soc/mediatek/mtk-cmdq.h>
22 #define DISP_COLOR_START(comp) ((comp)->data->color_offset)
34 * struct mtk_disp_color - DISP_COLOR driver structure
50 return clk_prepare_enable(color->clk); in mtk_color_clk_enable()
57 clk_disable_unprepare(color->clk); in mtk_color_clk_disable()
66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); in mtk_color_config()
67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); in mtk_color_config()
75 color->regs + DISP_COLOR_CFG_MAIN); in mtk_color_start()
76 writel(0x1, color->regs + DISP_COLOR_START(color)); in mtk_color_start()
[all …]
Dmtk_disp_aal.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-cmdq.h>
40 * struct mtk_disp_aal - Display Adaptive Ambient Light driver structure
57 return clk_prepare_enable(aal->clk); in mtk_aal_clk_enable()
64 clk_disable_unprepare(aal->clk); in mtk_aal_clk_disable()
77 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config()
78 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); in mtk_aal_config()
82 * mtk_aal_gamma_get_lut_size() - Get gamma LUT size for AAL
91 if (aal->data && aal->data->has_gamma) in mtk_aal_gamma_get_lut_size()
104 if (!(aal->data && aal->data->has_gamma)) in mtk_aal_gamma_set()
[all …]
Dmtk_disp_gamma.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-cmdq.h>
54 * struct mtk_disp_gamma - Display Gamma driver structure
71 return clk_prepare_enable(gamma->clk); in mtk_gamma_clk_enable()
78 clk_disable_unprepare(gamma->clk); in mtk_gamma_clk_disable()
85 if (gamma && gamma->data) in mtk_gamma_get_lut_size()
86 return gamma->data->lut_size; in mtk_gamma_get_lut_size()
93 int last_entry = lut_size - 1; in mtk_gamma_lut_is_descending()
102 * SoCs supporting 12-bits LUTs are using a new register layout that does
103 * always support (by HW) both 12-bits and 10-bits LUT but, on those, we
[all …]
Dmtk_disp_rdma.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/soc/mediatek/mtk-cmdq.h>
52 #define RDMA_FIFO_SIZE(rdma) ((rdma)->data->fifo_size)
78 * struct mtk_disp_rdma - DISP_RDMA driver structure
96 writel(0x0, priv->regs + DISP_REG_RDMA_INT_STATUS); in mtk_disp_rdma_irq_handler()
98 if (!priv->vblank_cb) in mtk_disp_rdma_irq_handler()
101 priv->vblank_cb(priv->vblank_cb_data); in mtk_disp_rdma_irq_handler()
110 unsigned int tmp = readl(rdma->regs + reg); in rdma_update_bits()
113 writel(tmp, rdma->regs + reg); in rdma_update_bits()
122 rdma->vblank_cb = vblank_cb; in mtk_rdma_register_vblank_cb()
[all …]
/linux-6.14.4/drivers/soc/mediatek/
Dmtk-mmsys.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/reset-controller.h>
14 #include <linux/soc/mediatek/mtk-mmsys.h>
16 #include "mtk-mmsys.h"
17 #include "mt8167-mmsys.h"
18 #include "mt8173-mmsys.h"
19 #include "mt8183-mmsys.h"
20 #include "mt8186-mmsys.h"
21 #include "mt8188-mmsys.h"
22 #include "mt8192-mmsys.h"
[all …]
Dmtk-mutex.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
14 #include <linux/soc/mediatek/mtk-cmdq.h>
681 * So that MUTEX can not only send a STREAM_DONE event to GCE
814 if (!mtx->mutex[i].claimed) { in mtk_mutex_get()
815 mtx->mutex[i].claimed = true; in mtk_mutex_get()
816 return &mtx->mutex[i]; in mtk_mutex_get()
819 return ERR_PTR(-EBUSY); in mtk_mutex_get()
826 mutex[mutex->id]); in mtk_mutex_put()
[all …]

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