Searched +full:ipq4019 +full:- +full:pinctrl (Results 1 – 19 of 19) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
D | qcom,ipq4019-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq4019-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Technologies, Inc. IPQ4019 TLMM block 10 - Bjorn Andersson <[email protected]> 13 Top Level Mode Multiplexer pin controller in Qualcomm IPQ4019 SoC. 16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 20 const: qcom,ipq4019-pinctrl 28 gpio-reserved-ranges: true [all …]
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/linux-6.14.4/arch/arm/boot/dts/qcom/ |
D | qcom-ipq4019-ap.dk07.1-c2.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 #include "qcom-ipq4019-ap.dk07.1.dtsi" 7 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C2"; 8 compatible = "qcom,ipq4019-ap-dk07.1-c2", "qcom,ipq4019"; 11 pinctrl@1000000 { 12 serial_1_pins: serial1-state { 15 bias-disable; 20 pinctrl-0 = <&serial_1_pins>; 21 pinctrl-names = "default";
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D | qcom-ipq4019-ap.dk07.1-c1.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 5 #include "qcom-ipq4019-ap.dk07.1.dtsi" 8 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1"; 9 compatible = "qcom,ipq4019-ap-dk07.1-c1", "qcom,ipq4019"; 14 perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; 21 pinctrl@1000000 { 22 serial_1_pins: serial1-state { 26 bias-disable; 29 spi_0_pins: spi-0-state { [all …]
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D | qcom-ipq4019-ap.dk07.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include "qcom-ipq4019.dtsi" 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/gpio/gpio.h> 9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1"; 22 stdout-path = "serial0:115200n8"; 26 pinctrl@1000000 { 27 serial_0_pins: serial0-state { 30 bias-disable; 33 i2c_0_pins: i2c-0-state { [all …]
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D | qcom-ipq4019-ap.dk04.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include "qcom-ipq4019.dtsi" 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/gpio/gpio.h> 9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1"; 17 stdout-path = "serial0:115200n8"; 26 pinctrl@1000000 { 27 serial_0_pins: serial0-state { 30 bias-disable; 33 serial_1_pins: serial1-state { [all …]
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D | qcom-ipq4019-ap.dk01.1.dtsi | 17 #include <dt-bindings/gpio/gpio.h> 18 #include "qcom-ipq4019.dtsi" 21 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1"; 28 stdout-path = "serial0:115200n8"; 37 serial_pins: serial-state { 40 bias-disable; 43 spi_0_pins: spi-0-state { 44 spi0-pins { 47 drive-strength = <12>; 48 bias-disable; [all …]
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D | qcom-ipq4019.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 16 model = "Qualcomm Technologies, Inc. IPQ4019"; 17 compatible = "qcom,ipq4019"; 18 interrupt-parent = <&intc>; [all …]
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D | qcom-ipq4018-jalapeno.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 4 #include "qcom-ipq4019.dtsi" 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/input/input.h> 14 mdio_pins: mdio-state { 15 mdio-pins { 18 bias-pull-up; 21 mdc-pins { 24 bias-pull-up; 28 serial_pins: serial-state { [all …]
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D | qcom-ipq4018-ap120c-ac.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include "qcom-ipq4019.dtsi" 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 8 model = "ALFA Network AP120C-AC"; 9 compatible = "alfa-network,ap120c-ac", "qcom,ipq4018"; 16 stdout-path = "serial0:115200n8"; 20 compatible = "gpio-keys"; 22 key-reset { 31 i2c0_pins: i2c0-state { [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 11 - Manivannan Sadhasivam <[email protected]> 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 [all …]
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/linux-6.14.4/drivers/pinctrl/qcom/ |
D | Kconfig.msm | 1 # SPDX-License-Identifier: GPL-2.0-only 8 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 15 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 19 tristate "Qualcomm IPQ4019 pin controller driver" 22 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 23 Qualcomm TLMM block found in the Qualcomm IPQ4019 platform. 29 This is the pinctrl, pinmux, pinconf and gpiolib driver for 38 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 45 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 53 This is the pinctrl, pinmux, pinconf and gpiolib driver for [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 obj-$(CONFIG_PINCTRL_MSM) += pinctrl-msm.o 4 obj-$(CONFIG_PINCTRL_APQ8064) += pinctrl-apq8064.o 5 obj-$(CONFIG_PINCTRL_APQ8084) += pinctrl-apq8084.o 6 obj-$(CONFIG_PINCTRL_IPQ4019) += pinctrl-ipq4019.o 7 obj-$(CONFIG_PINCTRL_IPQ5018) += pinctrl-ipq5018.o 8 obj-$(CONFIG_PINCTRL_IPQ8064) += pinctrl-ipq8064.o 9 obj-$(CONFIG_PINCTRL_IPQ5332) += pinctrl-ipq5332.o 10 obj-$(CONFIG_PINCTRL_IPQ5424) += pinctrl-ipq5424.o 11 obj-$(CONFIG_PINCTRL_IPQ8074) += pinctrl-ipq8074.o [all …]
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D | pinctrl-ipq4019.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include "pinctrl-msm.h" 703 { .compatible = "qcom,ipq4019-pinctrl", }, 709 .name = "ipq4019-pinctrl", 728 MODULE_DESCRIPTION("Qualcomm ipq4019 pinctrl driver");
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/ |
D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDHCI controller (sdhci-msm) 10 - Bjorn Andersson <[email protected]> 11 - Konrad Dybcio <[email protected]> 20 - enum: 21 - qcom,sdhci-msm-v4 23 - items: [all …]
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/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | ipq8074.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 15 interrupt-parent = <&intc>; 19 compatible = "fixed-clock"; 20 clock-frequency = <32768>; 21 #clock-cells = <0>; 25 compatible = "fixed-clock"; [all …]
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D | ipq6018.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h> 11 #include <dt-bindings/clock/qcom,apss-ipq.h> 12 #include <dt-bindings/thermal/thermal.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&intc>; 20 sleep_clk: sleep-clk { [all …]
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D | ipq9574.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. 9 #include <dt-bindings/clock/qcom,apss-ipq.h> 10 #include <dt-bindings/clock/qcom,ipq-cmn-pll.h> 11 #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 12 #include <dt-bindings/interconnect/qcom,ipq9574.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/reset/qcom,ipq9574-gcc.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/dma/qcom-gpi.h> 11 #include <dt-bindings/firmware/qcom,scm.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,rpm-icc.h> 14 #include <dt-bindings/interconnect/qcom,sm6115.h> [all …]
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/linux-6.14.4/ |
D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-[email protected] 88 F: drivers/scsi/3w-* [all …]
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