Home
last modified time | relevance | path

Searched full:gcc_gpu_gpll0_clk_src (Results 1 – 25 of 78) sorted by relevance

1234

/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dqcom,gpucc.yaml53 - const: gcc_gpu_gpll0_clk_src
87 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
90 "gcc_gpu_gpll0_clk_src",
Dqcom,msm8998-gpucc.yaml25 - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
Dqcom,sm6115-gpucc.yaml51 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
Dqcom,sm6125-gpucc.yaml59 <&gcc GCC_GPU_GPLL0_CLK_SRC>;
Dqcom,sm6375-gpucc.yaml65 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
Dqcom,qcm2290-gpucc.yaml68 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
Dqcom,sm8450-gpucc.yaml66 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
/linux-6.14.4/drivers/clk/qcom/
Dgpucc-sdm845.c63 { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" },
Dgpucc-sm6350.c135 { .index = DT_GPLL0_OUT_MAIN, .fw_name = "gcc_gpu_gpll0_clk_src" },
154 { .index = DT_GPLL0_OUT_MAIN, .fw_name = "gcc_gpu_gpll0_clk_src" },
Dgpucc-sc7280.c92 { .fw_name = "gcc_gpu_gpll0_clk_src" },
106 { .fw_name = "gcc_gpu_gpll0_clk_src", },
/linux-6.14.4/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h46 #define GCC_GPU_GPLL0_CLK_SRC 36 macro
Dqcom,sm7150-gcc.h44 #define GCC_GPU_GPLL0_CLK_SRC 32 macro
Dqcom,gcc-qcm2290.h94 #define GCC_GPU_GPLL0_CLK_SRC 84 macro
Dqcom,sar2130p-gcc.h35 #define GCC_GPU_GPLL0_CLK_SRC 25 macro
Dqcom,sm4450-gcc.h43 #define GCC_GPU_GPLL0_CLK_SRC 33 macro
Dqcom,gcc-sm6115.h81 #define GCC_GPU_GPLL0_CLK_SRC 73 macro
Dqcom,qcs615-gcc.h55 #define GCC_GPU_GPLL0_CLK_SRC 45 macro
Dqcom,gcc-sc7280.h44 #define GCC_GPU_GPLL0_CLK_SRC 34 macro
Dqcom,sm8750-gcc.h45 #define GCC_GPU_GPLL0_CLK_SRC 35 macro
Dqcom,gcc-sm6125.h123 #define GCC_GPU_GPLL0_CLK_SRC 114 macro
Dqcom,sm8550-gcc.h41 #define GCC_GPU_GPLL0_CLK_SRC 30 macro
Dqcom,qcs8300-gcc.h55 #define GCC_GPU_GPLL0_CLK_SRC 45 macro
Dqcom,sm6375-gcc.h108 #define GCC_GPU_GPLL0_CLK_SRC 97 macro
Dqcom,gcc-sdm845.h41 #define GCC_GPU_GPLL0_CLK_SRC 31 macro
Dqcom,gcc-sm8450.h55 #define GCC_GPU_GPLL0_CLK_SRC 43 macro

1234