| /linux-6.14.4/arch/riscv/boot/dts/sophgo/ |
| D | sg2042-cpus.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #address-cells = <1>;
9 #size-cells = <0>;
10 timebase-frequency = <50000000>;
12 cpu-map {
260 riscv,isa-base = "rv64i";
261 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
265 i-cache-block-size = <64>;
266 i-cache-size = <65536>;
267 i-cache-sets = <512>;
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| /linux-6.14.4/arch/riscv/boot/dts/spacemit/ |
| D | k1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 /dts-v1/;
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <24000000>;
18 cpu-map {
55 riscv,isa-base = "rv64i";
56 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
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| /linux-6.14.4/arch/riscv/boot/dts/sifive/ |
| D | fu540-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
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| D | fu740-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c000", "sifive,fu740";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
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| /linux-6.14.4/Documentation/devicetree/bindings/riscv/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <[email protected]>
11 - Palmer Dabbelt <[email protected]>
12 - Conor Dooley <[email protected]>
15 This document uses some terminology common to the RISC-V community
19 mandated by the RISC-V ISA: a PC and some registers. This
27 - $ref: /schemas/cpu.yaml#
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| /linux-6.14.4/Documentation/admin-guide/ |
| D | bcache.rst | 2 A block layer cache (bcache)
6 nice if you could use them as cache... Hence bcache.
11 This is the git repository of bcache-tools:
12 https://git.kernel.org/pub/scm/linux/kernel/git/colyli/bcache-tools.git/
17 It's designed around the performance characteristics of SSDs - it only allocates
18 in erase block sized buckets, and it uses a hybrid btree/log to track cached
19 extents (which can be anywhere from a single sector to the bucket size). It's
20 designed to avoid random writes at all costs; it fills up an erase block
25 great lengths to protect your data - it reliably handles unclean shutdown. (It
29 Writeback caching can use most of the cache for buffering writes - writing
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| /linux-6.14.4/arch/riscv/boot/dts/microchip/ |
| D | mpfs.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <1000000>;
21 i-cache-block-size = <64>;
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| /linux-6.14.4/fs/squashfs/ |
| D | file.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Squashfs - a compressed read only filesystem for Linux
14 * compressed fragment block (tail-end packed block). The compressed size
15 * of each datablock is stored in a block list contained within the
19 * larger), the code implements an index cache that caches the mapping from
20 * block index to datablock location on disk.
22 * The index cache allows Squashfs to handle large files (up to 1.75 TiB) while
23 * retaining a simple and space-efficient block list on disk. The cache
26 * The index cache is designed to be memory efficient, and by default uses
45 * Locate cache slot in range [offset, index] for specified inode. If
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| /linux-6.14.4/arch/powerpc/kernel/ |
| D | cacheinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Processor cache information made available to userspace via sysfs;
26 /* per-cpu object for tracking:
27 * - a "cache" kobject for the top-level directory
28 * - a list of "index" objects representing the cpu's local cache hierarchy
31 struct kobject *kobj; /* bare (not embedded) kobject for cache
36 /* "index" object: each cpu's cache directory has an index
37 * subdirectory corresponding to a cache object associated with the
43 struct cache *cache; member
47 * cache type */
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| /linux-6.14.4/arch/riscv/boot/dts/thead/ |
| D | th1520.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
18 timebase-frequency = <3000000>;
24 riscv,isa-base = "rv64i";
25 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
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| /linux-6.14.4/fs/ext2/ |
| D | xattr.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2001-2003 Andreas Gruenbacher <[email protected]>
18 * block. If all extended attributes of an inode are identical, these
19 * inodes may share the same extended attribute block. Such situations
20 * are automatically detected by keeping a cache of recent attribute block
21 * numbers and hashes over the block's contents in memory.
24 * Extended attribute block layout:
26 * +------------------+
36 * +------------------+
38 * The block header is followed by multiple entry descriptors. These entry
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| /linux-6.14.4/arch/riscv/boot/dts/starfive/ |
| D | jh7100.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive-jh7100.h>
9 #include <dt-bindings/reset/starfive-jh7100.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "sifive,u74-mc", "riscv";
23 d-cache-block-size = <64>;
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| D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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| /linux-6.14.4/fs/affs/ |
| D | file.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * (c) 1996 Hans-Joachim Widmaier - Rewritten
7 * (C) 1993 Ray Burr - Modified for Amiga FFS filesystem.
11 * (C) 1991 Linus Torvalds - minix filesystem
26 pr_debug("open(%lu,%d)\n", in affs_file_open()
27 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_open()
28 atomic_inc(&AFFS_I(inode)->i_opencnt); in affs_file_open()
35 pr_debug("release(%lu, %d)\n", in affs_file_release()
36 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_release()
38 if (atomic_dec_and_test(&AFFS_I(inode)->i_opencnt)) { in affs_file_release()
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| /linux-6.14.4/arch/powerpc/boot/dts/ |
| D | iss4xx-mpic.dts | 15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
[all …]
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| D | microwatt.dts | 1 /dts-v1/;
4 #size-cells = <0x02>;
5 #address-cells = <0x02>;
6 model-name = "microwatt";
7 compatible = "microwatt-soc";
13 reserved-memory {
14 #size-cells = <0x02>;
15 #address-cells = <0x02>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
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| /linux-6.14.4/arch/powerpc/include/asm/ |
| D | vdso_datapage.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 __u32 dcache_block_size; /* L1 d-cache block size */
25 __u32 icache_block_size; /* L1 i-cache block size */
26 __u32 dcache_log_block_size; /* L1 d-cache log block size */
27 __u32 icache_log_block_size; /* L1 i-cache log block size */
57 addis \ptr, \ptr, (_vdso_datapage - 999b + \offset)@ha
58 addi \ptr, \ptr, (_vdso_datapage - 999b + \offset)@l
61 #include <asm/asm-offsets.h>
|
| /linux-6.14.4/arch/sh/boot/dts/ |
| D | j2_mimas_v2.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 compatible = "jcore,j2-soc";
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&aic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-frequency = <50000000>;
22 d-cache-size = <8192>;
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| /linux-6.14.4/drivers/mtd/ |
| D | sm_ftl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2009 - Maxim Levitsky
16 #include <linux/mtd/nand-ecc-sw-hamming.h>
27 "Timeout (in ms) for cache flush (1000 ms default");
31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
34 /* ------------------- sysfs attributes ---------------------------------- */
47 strncpy(buf, sm_attr->data, sm_attr->len); in sm_attr_show()
48 return sm_attr->len; in sm_attr_show()
61 vendor = kstrndup(ftl->cis_buffer + SM_CIS_VENDOR_OFFSET, in sm_create_sysfs_attributes()
62 SM_SMALL_PAGE - SM_CIS_VENDOR_OFFSET, GFP_KERNEL); in sm_create_sysfs_attributes()
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| /linux-6.14.4/arch/riscv/boot/dts/allwinner/ |
| D | sun20i-d1s.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <[email protected]>
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cells = <1>;
12 #size-cells = <0>;
19 d-cache-block-size = <64>;
20 d-cache-sets = <256>;
21 d-cache-size = <32768>;
22 i-cache-block-size = <64>;
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| /linux-6.14.4/drivers/md/bcache/ |
| D | super.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * bcache setup/teardown code, and some metadata io - read a superblock and
66 unsigned int bucket_size = le16_to_cpu(s->bucket_size); in get_bucket_size()
68 if (sb->version >= BCACHE_SB_VERSION_CDEV_WITH_FEATURES) { in get_bucket_size()
72 max = sizeof(unsigned int) * BITS_PER_BYTE - 1; in get_bucket_size()
73 order = le16_to_cpu(s->bucket_size); in get_bucket_size()
79 pr_err("Bucket size (1 << %u) overflows\n", in get_bucket_size()
84 le16_to_cpu(s->obso_bucket_size_hi) << 16; in get_bucket_size()
97 sb->first_bucket= le16_to_cpu(s->first_bucket); in read_super_common()
98 sb->nbuckets = le64_to_cpu(s->nbuckets); in read_super_common()
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| /linux-6.14.4/sound/pci/emu10k1/ |
| D | emu10k1_patch.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
22 * allocate a sample block and copy data from userspace
33 int truesize, size, blocksize; in snd_emu10k1_sample_new() local
37 emu = rec->hw; in snd_emu10k1_sample_new()
39 return -EINVAL; in snd_emu10k1_sample_new()
41 if (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP | SNDRV_SFNT_SAMPLE_REVERSE_LOOP)) { in snd_emu10k1_sample_new()
42 /* should instead return -ENOTSUPP; but compatibility */ in snd_emu10k1_sample_new()
43 dev_warn(emu->card->dev, in snd_emu10k1_sample_new()
44 "Emu10k1 wavetable patch %d with unsupported loop feature\n", in snd_emu10k1_sample_new()
45 sp->v.sample); in snd_emu10k1_sample_new()
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| /linux-6.14.4/drivers/gpu/drm/i915/gt/shaders/clear_kernel/ |
| D | ivb.asm | 1 // SPDX-License-Identifier: MIT
10 * 2. Write 32x16 block of all "0" to render target buffer which indirectly clears
11 * 512 bytes of Render Cache.
20 * DW 1.0 - Block Offset to write Render Cache
21 * DW 1.1 [15:0] - Clear Word
22 * DW 1.2 - Delay iterations
23 * DW 1.3 - Enable Instrumentation (only for debug)
24 * DW 1.4 - Rsvd (intended for context ID)
25 * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount
26 * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count)
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| D | hsw.asm | 1 // SPDX-License-Identifier: MIT
10 * 2. Write 32x16 block of all "0" to render target buffer which indirectly clears
11 * 512 bytes of Render Cache.
20 * DW 1.0 - Block Offset to write Render Cache
21 * DW 1.1 [15:0] - Clear Word
22 * DW 1.2 - Delay iterations
23 * DW 1.3 - Enable Instrumentation (only for debug)
24 * DW 1.4 - Rsvd (intended for context ID)
25 * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount
26 * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count)
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| /linux-6.14.4/drivers/md/ |
| D | dm-cache-target.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "dm-bio-prison-v2.h"
10 #include "dm-bio-record.h"
11 #include "dm-cache-metadata.h"
12 #include "dm-io-tracker.h"
13 #include "dm-cache-background-tracker.h"
15 #include <linux/dm-io.h>
16 #include <linux/dm-kcopyd.h>
25 #define DM_MSG_PREFIX "cache"
28 "A percentage of time allocated for copying to and/or from cache");
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