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/linux-6.14.4/Documentation/devicetree/bindings/misc/
Dqcom,fastrpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <[email protected]>
13 The FastRPC implements an IPC (Inter-Processor Communication)
25 - adsp
26 - mdsp
27 - sdsp
28 - cdsp
29 - cdsp1
[all …]
/linux-6.14.4/Documentation/userspace-api/media/v4l/
Dmetafmt-vsp1-hgo.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-vsp1-hgo:
9 Renesas R-Car VSP1 1-D Histogram Data
15 This format describes histogram data generated by the Renesas R-Car VSP1 1-D
20 computes the minimum, maximum and sum of all pixels as well as per-channel
23 The HGO can compute histograms independently per channel, on the maximum of the
28 - In *64 bins normal mode*, the HGO operates on the three channels independently
29 to compute three 64-bins histograms. RGB, YCbCr and HSV image formats are
31 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
32 channels to compute a single 64-bins histogram. Only the RGB image format is
[all …]
/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/
Diwl-utils.c1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
10 #include "iwl-drv.h"
11 #include "iwl-utils.h"
19 struct ieee80211_hdr *hdr = (void *)skb->data; in iwl_tx_tso_segment()
20 char cb[sizeof(skb->cb)]; in iwl_tx_tso_segment() local
23 unsigned int mss = skb_shinfo(skb)->gso_size; in iwl_tx_tso_segment()
24 bool ipv4 = (skb->protocol == htons(ETH_P_IP)); in iwl_tx_tso_segment()
25 bool qos = ieee80211_is_data_qos(hdr->frame_control); in iwl_tx_tso_segment()
26 u16 ip_base_id = ipv4 ? ntohs(ip_hdr(skb)->id) : 0; in iwl_tx_tso_segment()
28 skb_shinfo(skb)->gso_size = num_subframes * mss; in iwl_tx_tso_segment()
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
[all …]
Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
14 #include <dt-bindings/interconnect/qcom,sm6115.h>
[all …]
Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/firmware/qcom,scm.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/phy/phy-qcom-qmp.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
[all …]
Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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Dqcs8300.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qcs8300-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/clock/qcom,sa8775p-camcc.h>
9 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-videocc.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
[all …]
Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sm8250.h>
[all …]
Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
[all …]
Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sc8280xp-camcc.h>
12 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
[all …]
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
/linux-6.14.4/drivers/platform/x86/intel/speed_select_if/
Disst_tpmi_core.c1 // SPDX-License-Identifier: GPL-2.0-only
52 * struct sst_header - SST main header
63 * This register allows SW to discover SST capability and the offsets to SST-CP
64 * and SST-PP register banks.
75 * struct cp_header - SST-CP (core-power) header
76 * @feature_id: 0=SST-CP, 1=SST-PP, 2=SST-BF, 3=SST-TF
81 * This structure is used store SST-CP header. This is packed to the same
92 * struct pp_header - SST-PP (Perf profile) header
93 * @feature_id: 0=SST-CP, 1=SST-PP, 2=SST-BF, 3=SST-TF
95 * @level_en_mask: SST-PP level enable/disable fuse mask
[all …]
/linux-6.14.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vm.c29 #include <linux/dma-fence-array.h>
32 #include <linux/dma-buf.h>
69 * Each GPUVM is represented by a 1-2 or 1-5 level page table, depending
90 #define START(node) ((node)->start)
91 #define LAST(node) ((node)->last)
100 * struct amdgpu_prt_cb - Helper to disable partial resident texture feature from a fence callback
110 * @cb: callback
112 struct dma_fence_cb cb; member
116 * struct amdgpu_vm_tlb_seq_struct - Helper to increment the TLB flush sequence
125 * @cb: callback
[all …]
/linux-6.14.4/Documentation/gpu/amdgpu/
Ddebugging.rst11 `vm_fault_stop` - If non-0, halt the GPU memory controller on a GPU page fault.
13 `vm_update_mode` - If non-0, use the CPU to update GPU page tables rather than
26 …[gfxhub0] no-retry page fault (src_id:0 ring:24 vmid:3 pasid:32777, for process glxinfo pid 2424 t…
37 hub used for graphics, compute, and sdma on some chips. mmhub is the
38 memory hub used for multi-media and sdma on some chips.
41 caused by the kernel driver or firmware. If the vmid is non-0, it is generally
51 - CB/DB: The color/depth backend of the graphics pipe
52 - CPF: Command Processor Frontend
53 - CPC: Command Processor Compute
54 - CPG: Command Processor Graphics
[all …]
/linux-6.14.4/include/net/
Dgso.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 /* Keeps track of mac header offset relative to skb->head.
10 * For non-tunnel skb it points to skb_mac_header() and for
24 #define SKB_GSO_CB(skb) ((struct skb_gso_cb *)((skb)->cb + SKB_GSO_CB_OFFSET))
28 return (skb_mac_header(inner_skb) - inner_skb->head) - in skb_tnl_header_len()
29 SKB_GSO_CB(inner_skb)->mac_offset; in skb_tnl_header_len()
43 SKB_GSO_CB(skb)->mac_offset += (new_headroom - headroom); in gso_pskb_expand_head()
50 if (skb->remcsum_offload) in gso_reset_checksum()
53 SKB_GSO_CB(skb)->csum = res; in gso_reset_checksum()
54 SKB_GSO_CB(skb)->csum_start = skb_checksum_start(skb) - skb->head; in gso_reset_checksum()
[all …]
Dudp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
34 * struct udp_skb_cb - UDP(-Lite) private variables
37 * @cscov: checksum coverage length (UDP-Lite only)
50 #define UDP_SKB_CB(__skb) ((struct udp_skb_cb *)((__skb)->cb))
53 * struct udp_hslot - UDP hash slot used by udp_table.hash/hash4
73 * struct udp_hslot_main - UDP hash slot used by udp_table.hash2
88 * struct udp_table - UDP table
112 return &table->hash[udp_hashfn(net, num, table->mask)]; in udp_hashslot()
122 return &table->hash2[hash & table->mask].hslot; in udp_hashslot2()
161 /* Must be called with table->hash2 initialized */
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/linux-6.14.4/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
Ddcn401_dpp.c36 dpp->tf_regs->reg
39 dpp->base.ctx
43 dpp->tf_shift->field_name, dpp->tf_mask->field_name
50 DPP_CLOCK_ENABLE, &s->is_enabled); in dpp401_read_state()
184 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0); in dpp401_dpp_setup()
185 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1, alpha_2bit_lut->lut1); in dpp401_dpp_setup()
186 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT2, alpha_2bit_lut->lut2); in dpp401_dpp_setup()
187 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT3, alpha_2bit_lut->lut3); in dpp401_dpp_setup()
269 dpp->base.ctx = ctx; in dpp401_construct()
271 dpp->base.inst = inst; in dpp401_construct()
[all …]
/linux-6.14.4/drivers/nfc/
Dnfcsim.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #define NFCSIM_ERR(d, fmt, args...) nfc_err(&d->nfc_digital_dev->nfc_dev->dev, \
19 #define NFCSIM_DBG(d, fmt, args...) dev_dbg(&d->nfc_digital_dev->nfc_dev->dev, \
46 nfc_digital_cmd_complete_t cb; member
73 mutex_init(&link->lock); in nfcsim_link_new()
74 init_waitqueue_head(&link->recv_wait); in nfcsim_link_new()
81 dev_kfree_skb(link->skb); in nfcsim_link_free()
87 link->cond = 1; in nfcsim_link_recv_wake()
88 wake_up_interruptible(&link->recv_wait); in nfcsim_link_recv_wake()
94 mutex_lock(&link->lock); in nfcsim_link_set_skb()
[all …]
/linux-6.14.4/drivers/gpu/drm/amd/display/dc/dpp/dcn32/
Ddcn32_dpp.c33 /* Compute the maximum number of lines that we can fit in the line buffer */
43 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl32_calc_lb_num_partitions()
44 scl_data->viewport.width : scl_data->recout.width; in dscl32_calc_lb_num_partitions()
45 int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ? in dscl32_calc_lb_num_partitions()
46 scl_data->viewport_c.width : scl_data->recout.width; in dscl32_calc_lb_num_partitions()
67 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
68 scl_data->viewport.height == scl_data->v_active) { in dscl32_calc_lb_num_partitions()
69 /* 420 mode: luma using all 3 mem from Y, plus 3rd mem from Cr and Cb */ in dscl32_calc_lb_num_partitions()
75 /* 420 mode: luma using all 3 mem from Y, plus 3rd mem from Cr and Cb */ in dscl32_calc_lb_num_partitions()
81 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
[all …]

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