Searched +full:cboz +full:- +full:block +full:- +full:size (Results 1 – 5 of 5) sorted by relevance
/linux-6.14.4/arch/riscv/boot/dts/spacemit/ |
D | k1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 /dts-v1/; 8 #address-cells = <2>; 9 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 timebase-frequency = <24000000>; 18 cpu-map { 55 riscv,isa-base = "rv64i"; 56 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", [all …]
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/linux-6.14.4/arch/riscv/mm/ |
D | cacheflush.c | 1 // SPDX-License-Identifier: GPL-2.0-only 35 * Performs an icache flush for the given MM context. RISC-V has no direct 39 * single-hart processes on a many-hart machine, ie 'make -j') we avoid the 52 mask = &mm->context.icache_stale_mask; in flush_icache_mm() 65 if (mm == current->active_mm && local) { in flush_icache_mm() 91 if (!test_bit(PG_dcache_clean, &folio->flags)) { in flush_icache_pte() 93 set_bit(PG_dcache_clean, &folio->flags); in flush_icache_pte() 136 /* set block-size for cbom and/or cboz extension if available */ in riscv_init_cbo_blocksizes() 137 cbo_get_block_size(node, "riscv,cbom-block-size", in riscv_init_cbo_blocksizes() 139 cbo_get_block_size(node, "riscv,cboz-block-size", in riscv_init_cbo_blocksizes() [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/riscv/ |
D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V CPUs 10 - Paul Walmsley <[email protected]> 11 - Palmer Dabbelt <[email protected]> 12 - Conor Dooley <[email protected]> 15 This document uses some terminology common to the RISC-V community 19 mandated by the RISC-V ISA: a PC and some registers. This 27 - $ref: /schemas/cpu.yaml# [all …]
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/linux-6.14.4/arch/riscv/kernel/ |
D | cpufeature.c | 1 // SPDX-License-Identifier: GPL-2.0-only 24 #include <asm/text-patching.h> 32 #define NUM_ALPHA_EXTS ('z' - 'a' + 1) 41 /* Per-cpu ISA extensions. */ 47 * riscv_isa_extension_base() - Get base extension word 63 * __riscv_isa_extension_available() - Check whether given extension 87 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_ext_zicbom_validate() 88 return -EINVAL; in riscv_ext_zicbom_validate() 91 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_ext_zicbom_validate() 92 return -EINVAL; in riscv_ext_zicbom_validate() [all …]
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/linux-6.14.4/include/acpi/ |
D | actbl2.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 6 * Copyright (C) 2000 - 2023, Intel Corp. 52 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 60 * All tables must be byte-packed to match the ACPI specification, since 70 * essentially useless for dealing with packed data in on-disk formats or 79 * AEST - Arm Error Source Table 90 /* Common Subtable header - one per Node Structure (Subtable) */ 323 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 343 * APMT - ARM Performance Monitoring Unit Table [all …]
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