Home
last modified time | relevance | path

Searched +full:assigned +full:- +full:clock +full:- +full:rates +full:- +full:u64 (Results 1 – 25 of 34) sorted by relevance

12

/linux-6.14.4/drivers/clk/
Dclk-conf.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
9 #include <linux/clk/clk-conf.h>
21 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
22 "#clock-cells"); in __set_clk_parents()
23 if (num_parents == -EINVAL) in __set_clk_parents()
24 pr_err("clk: invalid value of clock-parents property at %pOF\n", in __set_clk_parents()
28 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
29 "#clock-cells", index, &clkspec); in __set_clk_parents()
32 if (rc == -ENOENT) in __set_clk_parents()
[all …]
Dkunit_clk_assigned_rates_u64_one_consumer.dtso1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 clk: kunit-clock {
9 compatible = "test,clk-assigned-rates";
10 #clock-cells = <0>;
13 kunit-clock-consumer {
14 compatible = "test,clk-consumer";
15 assigned-clocks = <&clk>;
16 assigned-clock-rates-u64 = /bits/ 64 <ASSIGNED_RATES_0_RATE>;
Dkunit_clk_assigned_rates_u64_multiple_consumer.dtso1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 clk: kunit-clock {
9 compatible = "test,clk-assigned-rates";
10 #clock-cells = <1>;
13 kunit-clock-consumer {
14 compatible = "test,clk-consumer";
15 assigned-clocks = <&clk 0>,
17 assigned-clock-rates-u64 = /bits/ 64 <ASSIGNED_RATES_0_RATE>,
Dkunit_clk_assigned_rates_u64_one.dtso1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 clk: kunit-clock {
9 compatible = "test,clk-assigned-rates";
10 #clock-cells = <0>;
11 assigned-clocks = <&clk>;
12 assigned-clock-rates-u64 = /bits/ 64 <ASSIGNED_RATES_0_RATE>;
Dkunit_clk_assigned_rates_u64_multiple.dtso1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 clk: kunit-clock {
9 compatible = "test,clk-assigned-rates";
10 #clock-cells = <1>;
11 assigned-clocks = <&clk 0>,
13 assigned-clock-rates-u64 = /bits/ 64 <ASSIGNED_RATES_0_RATE>,
Dclk_test.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
7 #include <linux/clk/clk-conf.h>
39 return ctx->rate; in clk_dummy_recalc_rate()
53 * If there's a maximum set, always run the clock at the maximum in clk_dummy_maximize_rate()
56 if (req->max_rate < ULONG_MAX) in clk_dummy_maximize_rate()
57 req->rate = req->max_rate; in clk_dummy_maximize_rate()
66 * If there's a minimum set, always run the clock at the minimum in clk_dummy_minimize_rate()
69 if (req->min_rate > 0) in clk_dummy_minimize_rate()
70 req->rate = req->min_rate; in clk_dummy_minimize_rate()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dqcom,ipq9574-cmn-pll.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-cmn-pll.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm CMN PLL Clock Controller on IPQ SoC
10 - Bjorn Andersson <[email protected]>
11 - Luo Jie <[email protected]>
14 The CMN (or common) PLL clock controller expects a reference
15 input clock. This reference clock is from the on-board Wi-Fi.
27 - qcom,ipq9574-cmn-pll
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq-cmn-pll.h>
11 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
12 #include <dt-bindings/interconnect/qcom,ipq9574.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
/linux-6.14.4/sound/aoa/soundbus/
Dsoundbus.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * you don't want to have the codec chip acting as clock source
20 * no clock for a while and other chips might reset, so we notify
22 * The constants here are codec-point of view, so when we switch
36 u64 formats; /* SNDRV_PCM_FMTBIT_* */
37 unsigned int rates; /* SNDRV_PCM_RATE_* */ member
67 * formats or rates being 0. */
70 /* Master clock speed factor
71 * to be used (master clock speed = sysclock_factor * sampling freq)
76 /* Bus factor, bus clock speed = bus_factor * sampling freq)
[all …]
/linux-6.14.4/drivers/clk/qcom/
Dipq-cmn-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * CMN PLL block expects the reference clock from on-board Wi-Fi block,
13 * On the IPQ9574 SoC, there are three clocks with 50 MHZ and one clock
15 * and one clock with 353 MHZ to PPE. The other fixed rate output clocks
16 * are supplied to GCC (24 MHZ as XO and 32 KHZ as sleep clock), and to PCS
19 * +---------+
21 * +--+---+--+
24 * +-------+---+------+
25 * | +-------------> eth0-50mhz
27 * -------->+ +-------------> eth1-50mhz
[all …]
/linux-6.14.4/sound/usb/
Dcard.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 u64 formats; /* ALSA format bits */
16 unsigned int fmt_type; /* USB audio format type (1-3) */
18 unsigned int frame_size; /* samples per frame for non-audio */
34 unsigned int rates; /* rate bitmasks */ member
35 unsigned int rate_min, rate_max; /* min/max rates */
38 unsigned char clock; /* associated clock */ member
68 int opened; /* open refcount; protect with chip->mutex */
131 bool lowlatency_playback; /* low-latency playback mode */
132 bool need_setup; /* (re-)need for hw_params? */
[all …]
Dstream.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/usb/audio-v2.h>
11 #include <linux/usb/audio-v3.h>
26 #include "clock.h"
33 list_del(&fp->list); /* unlink for avoiding double-free */ in audioformat_free()
34 kfree(fp->rate_table); in audioformat_free()
35 kfree(fp->chmap); in audioformat_free()
46 if (!subs->num_formats) in free_substream()
48 list_for_each_entry_safe(fp, n, &subs->fmt_list, list) in free_substream()
50 kfree(subs->str_pd); in free_substream()
[all …]
/linux-6.14.4/drivers/clk/keystone/
Dsci-clk.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SCI Clock driver for keystone based devices
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
6 * Tero Kristo <t-[email protected]>
8 #include <linux/clk-provider.h>
24 * struct sci_clk_provider - TI SCI clock provider representation
27 * @dev: Device pointer for the clock provider
40 * struct sci_clk - TI SCI clock representation
41 * @hw: Hardware clock cookie for common clock framework
43 * @clk_id: Clock index
[all …]
/linux-6.14.4/include/linux/
Dscmi_protocol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2018-2021 ARM Ltd.
21 * struct scmi_revision_info - version information structure
30 * @impl_ver: A vendor-specific implementation version.
32 * @sub_vendor_id: A sub-vendor identifier(Null terminated ASCII string)
57 u64 rates[SCMI_MAX_NUM_RATES]; member
60 u64 min_rate;
61 u64 max_rate;
62 u64 step_size;
87 * struct scmi_clk_proto_ops - represents the various operations provided
[all …]
/linux-6.14.4/sound/soc/fsl/
Dfsl_asrc.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
14 #include <linux/dma/imx-dma.h>
26 dev_err(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
29 dev_dbg(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
32 dev_warn(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
130 u64 n; in fsl_asrc_divider_avail()
159 * fsl_asrc_sel_proc - Select the pre-processing and post-processing options
162 * @pre_proc: return value for pre-processing option
163 * @post_proc: return value for post-processing option
[all …]
Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
17 // manually skip this data in the FIQ handler. With sampling rates different
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
[all …]
/linux-6.14.4/sound/pci/hda/
Dhda_controller.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 /* for art-tsc conversion */
51 /* release the assigned stream */
61 return &apcm->info->stream[substream->stream]; in to_hda_pcm_stream()
64 static u64 azx_adjust_codec_delay(struct snd_pcm_substream *substream, in azx_adjust_codec_delay()
65 u64 nsec) in azx_adjust_codec_delay()
69 u64 codec_frames, codec_nsecs; in azx_adjust_codec_delay()
71 if (!hinfo->ops.get_delay) in azx_adjust_codec_delay()
74 codec_frames = hinfo->ops.get_delay(hinfo, apcm->codec, substream); in azx_adjust_codec_delay()
76 substream->runtime->rate); in azx_adjust_codec_delay()
[all …]
/linux-6.14.4/net/mac80211/
Dsta_info.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2002-2005, Devicescape Software, Inc.
4 * Copyright 2013-2014 Intel Mobile Communications GmbH
5 * Copyright(c) 2015-2017 Intel Deutschland GmbH
6 * Copyright(c) 2020-2024 Intel Corporation
24 * enum ieee80211_sta_info_flags - Stations flags
31 * @WLAN_STA_PS_STA: Station is in power-save mode
35 * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
45 * power-save mode logically to flush frames that might still
47 * @WLAN_STA_PSPOLL: Station sent PS-poll while driver was keeping
[all …]
/linux-6.14.4/include/sound/
Dpcm.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Abramo Bagnara <abramo@alsa-project.org>
21 #define snd_pcm_substream_chip(substream) ((substream)->private_data)
22 #define snd_pcm_chip(pcm) ((pcm)->private_data)
34 u64 formats; /* SNDRV_PCM_FMTBIT_* */
36 unsigned int rates; /* SNDRV_PCM_RATE_* */ member
86 #define SNDRV_PCM_DEVICES (SNDRV_OS_MINORS-2)
106 #define SNDRV_PCM_POS_XRUN ((snd_pcm_uframes_t)-1)
108 /* If you change this don't forget to change rates[] table in pcm_native.c */
126 /* extended rates since 6.12 */
[all …]
/linux-6.14.4/drivers/gpu/drm/i915/display/
Dintel_display_types.h3 * Copyright (c) 2007-2008 Intel Corporation
67 /* these are outputs from the chip - integrated only
85 HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */
101 * create the DMA scatter-gather list for each FB color plane. This sg
113 * in the rotated and remapped GTT view all no-CCS formats (up to 2
217 * state. This must be called _after_ display->get_pipe_config has
218 * pre-filled the pipe config. Note that intel_encoder->base.crtc must
267 * Enable/disable the clock to the port.
273 * Returns whether the port clock is enabled or not.
442 u64 value;
[all …]
/linux-6.14.4/drivers/net/wireless/ath/ath5k/
Dath5k.h2 * Copyright (c) 2004-2007 Reyk Floeter <[email protected]>
3 * Copyright (c) 2006-2007 Nick Kossifidis <[email protected]>
62 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */
63 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV8 0x0058 /* AR5312 WMAC (AP43-030) */
70 #define PCI_DEVICE_ID_ATHEROS_AR2413 0x001a /* AR2413 (Griffin-lite) */
72 #define PCI_DEVICE_ID_ATHEROS_AR5424 0x001c /* AR5424 (Condor PCI-E) */
189 #define AR5K_TUNE_NOISE_FLOOR -72
190 #define AR5K_TUNE_CCA_MAX_GOOD_VALUE -95
274 * enum ath5k_version - MAC Chips
286 * enum ath5k_radio - PHY Chips
[all …]
/linux-6.14.4/drivers/clk/bcm/
Dclk-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0+
8 * DOC: BCM2835 CPRMAN (clock manager for the "audio" domain)
10 * The clock tree on the 2835 has several levels. There's a root
22 * skip layers of the tree (for example, the pixel clock comes
23 * directly from the PLLH PIX channel without using a CM_*CTL clock
27 #include <linux/clk-provider.h>
38 #include <dt-bindings/clock/bcm2835.h>
45 # define CM_DIV_FRAC_MASK GENMASK(CM_DIV_FRAC_BITS - 1, 0)
253 # define A2W_PLL_FRAC_MASK ((1 << A2W_PLL_FRAC_BITS) - 1)
321 * Real names of cprman clock parents looked up through
[all …]
/linux-6.14.4/include/drm/
Ddrm_connector.h58 DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */
62 * enum drm_connector_status - status for a &drm_connector
77 * nothing there. It is driver-dependent whether a connector with this
84 * flicker (like load-detection when the connector is in use), or when a
85 * hardware resource isn't available (like when load-detection needs a
95 * enum drm_connector_registration_state - userspace registration status for
128 * - An unregistered connector may only have its DPMS changed from
129 * On->Off. Once DPMS is changed to Off, it may not be switched back
131 * - Modesets are not allowed on unregistered connectors, unless they
132 * would result in disabling its assigned CRTCs. This means
[all …]
/linux-6.14.4/drivers/net/ethernet/ti/
Dam65-cpsw-qos.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
6 * Enhanced Scheduler Traffic (EST - P802.1Qbv/D2.2)
7 * Interspersed Express Traffic (IET - P802.3br/D2.0)
17 #include "am65-cpsw-nuss.h"
18 #include "am65-cpsw-qos.h"
19 #include "am65-cpts.h"
38 ir = DIV_ROUND_UP(((u64)rate_mbps * 32768), bus_freq); in am65_cpsw_qos_tx_rate_calc()
47 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
48 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
[all …]
/linux-6.14.4/sound/drivers/vx/
Dvx_pcm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * IBL size, typically 126 samples. at each end of chunk, the end-of-buffer
15 * pipe->transferred is the counter of data which has been already transferred.
25 * the current point of read buffer is kept in pipe->hw_ptr. note that
29 * - linked trigger for full-duplex mode.
30 * - scheduled action on the stream.
48 int offset = pipe->hw_ptr; in vx_pcm_read_per_bytes()
49 unsigned char *buf = (unsigned char *)(runtime->dma_area + offset); in vx_pcm_read_per_bytes()
51 if (++offset >= pipe->buffer_bytes) { in vx_pcm_read_per_bytes()
53 buf = (unsigned char *)runtime->dma_area; in vx_pcm_read_per_bytes()
[all …]

12