Lines Matching +full:assigned +full:- +full:clock +full:- +full:rates +full:- +full:u64
1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
7 #include <linux/clk/clk-conf.h>
39 return ctx->rate; in clk_dummy_recalc_rate()
53 * If there's a maximum set, always run the clock at the maximum in clk_dummy_maximize_rate()
56 if (req->max_rate < ULONG_MAX) in clk_dummy_maximize_rate()
57 req->rate = req->max_rate; in clk_dummy_maximize_rate()
66 * If there's a minimum set, always run the clock at the minimum in clk_dummy_minimize_rate()
69 if (req->min_rate > 0) in clk_dummy_minimize_rate()
70 req->rate = req->min_rate; in clk_dummy_minimize_rate()
82 ctx->rate = rate; in clk_dummy_set_rate()
89 return -EINVAL; in clk_dummy_single_set_parent()
122 * what all the parents can provide, it will return -EINVAL.
130 * between rates above the parent rate which would be rounded to
131 * what the parent can provide, but rates below will simply
151 return -EINVAL; in clk_multiple_parents_mux_set_parent()
153 ctx->current_parent = index; in clk_multiple_parents_mux_set_parent()
163 return ctx->current_parent; in clk_multiple_parents_mux_get_parent()
186 return -ENOMEM; in clk_test_init_with_ops()
187 ctx->rate = DUMMY_CLOCK_INIT_RATE; in clk_test_init_with_ops()
188 test->priv = ctx; in clk_test_init_with_ops()
192 ctx->hw.init = &init; in clk_test_init_with_ops()
194 ret = clk_hw_register(NULL, &ctx->hw); in clk_test_init_with_ops()
218 struct clk_dummy_context *ctx = test->priv; in clk_test_exit()
220 clk_hw_unregister(&ctx->hw); in clk_test_exit()
228 struct clk_dummy_context *ctx = test->priv; in clk_test_get_rate()
229 struct clk_hw *hw = &ctx->hw; in clk_test_get_rate()
235 KUNIT_EXPECT_EQ(test, rate, ctx->rate); in clk_test_get_rate()
249 struct clk_dummy_context *ctx = test->priv; in clk_test_set_get_rate()
250 struct clk_hw *hw = &ctx->hw; in clk_test_set_get_rate()
274 struct clk_dummy_context *ctx = test->priv; in clk_test_set_set_get_rate()
275 struct clk_hw *hw = &ctx->hw; in clk_test_set_set_get_rate()
300 struct clk_dummy_context *ctx = test->priv; in clk_test_round_set_get_rate()
301 struct clk_hw *hw = &ctx->hw; in clk_test_round_set_get_rate()
330 * Test suite for a basic rate clock, without any parent.
335 .name = "clk-test",
348 return -ENOMEM; in clk_uncached_test_init()
349 test->priv = ctx; in clk_uncached_test_init()
351 ctx->rate = DUMMY_CLOCK_INIT_RATE; in clk_uncached_test_init()
352 ctx->hw.init = CLK_HW_INIT_NO_PARENT("test-clk", in clk_uncached_test_init()
356 ret = clk_hw_register(NULL, &ctx->hw); in clk_uncached_test_init()
364 * Test that for an uncached clock, the clock framework doesn't cache
365 * the rate and clk_get_rate() will return the underlying clock rate
370 struct clk_dummy_context *ctx = test->priv; in clk_test_uncached_get_rate()
371 struct clk_hw *hw = &ctx->hw; in clk_test_uncached_get_rate()
379 /* We change the rate behind the clock framework's back */ in clk_test_uncached_get_rate()
380 ctx->rate = DUMMY_CLOCK_RATE_1; in clk_test_uncached_get_rate()
389 * Test that for an uncached clock, clk_set_rate_range() will work
394 struct clk_dummy_context *ctx = test->priv; in clk_test_uncached_set_range()
395 struct clk_hw *hw = &ctx->hw; in clk_test_uncached_set_range()
414 * Test that for an uncached clock, clk_set_rate_range() will work
423 struct clk_dummy_context *ctx = test->priv; in clk_test_uncached_updated_rate_set_range()
424 struct clk_hw *hw = &ctx->hw; in clk_test_uncached_updated_rate_set_range()
428 /* We change the rate behind the clock framework's back */ in clk_test_uncached_updated_rate_set_range()
429 ctx->rate = DUMMY_CLOCK_RATE_1 + 1000; in clk_test_uncached_updated_rate_set_range()
451 * Test suite for a basic, uncached, rate clock, without any parent.
456 .name = "clk-uncached-test",
466 const char *parents[2] = { "parent-0", "parent-1"}; in clk_multiple_parents_mux_test_init()
471 return -ENOMEM; in clk_multiple_parents_mux_test_init()
472 test->priv = ctx; in clk_multiple_parents_mux_test_init()
474 ctx->parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0", in clk_multiple_parents_mux_test_init()
477 ctx->parents_ctx[0].rate = DUMMY_CLOCK_RATE_1; in clk_multiple_parents_mux_test_init()
478 ret = clk_hw_register_kunit(test, NULL, &ctx->parents_ctx[0].hw); in clk_multiple_parents_mux_test_init()
482 ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1", in clk_multiple_parents_mux_test_init()
485 ctx->parents_ctx[1].rate = DUMMY_CLOCK_RATE_2; in clk_multiple_parents_mux_test_init()
486 ret = clk_hw_register_kunit(test, NULL, &ctx->parents_ctx[1].hw); in clk_multiple_parents_mux_test_init()
490 ctx->current_parent = 0; in clk_multiple_parents_mux_test_init()
491 ctx->hw.init = CLK_HW_INIT_PARENTS("test-mux", parents, in clk_multiple_parents_mux_test_init()
494 ret = clk_hw_register_kunit(test, NULL, &ctx->hw); in clk_multiple_parents_mux_test_init()
502 * Test that for a clock with multiple parents, clk_get_parent()
508 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_multiple_parents_mux_get_parent()
509 struct clk_hw *hw = &ctx->hw; in clk_test_multiple_parents_mux_get_parent()
511 struct clk *parent = clk_hw_get_clk(&ctx->parents_ctx[0].hw, NULL); in clk_test_multiple_parents_mux_get_parent()
520 * Test that for a clock with a multiple parents, clk_has_parent()
526 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_multiple_parents_mux_has_parent()
527 struct clk_hw *hw = &ctx->hw; in clk_test_multiple_parents_mux_has_parent()
531 parent = clk_hw_get_clk(&ctx->parents_ctx[0].hw, NULL); in clk_test_multiple_parents_mux_has_parent()
535 parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_test_multiple_parents_mux_has_parent()
543 * Test that for a clock with a multiple parents, if we set a range on
544 * that clock and the parent is changed, its rate after the reparenting
548 * reevaluate whether the new clock rate is within its boundaries or
554 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
555 struct clk_hw *hw = &ctx->hw; in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
563 parent1 = clk_hw_get_clk_kunit(test, &ctx->parents_ctx[0].hw, NULL); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
567 parent2 = clk_hw_get_clk_kunit(test, &ctx->parents_ctx[1].hw, NULL); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
577 DUMMY_CLOCK_RATE_1 - 1000, in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
586 KUNIT_EXPECT_GE(test, rate, DUMMY_CLOCK_RATE_1 - 1000); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
598 * Test suite for a basic mux clock with two parents, with
606 .name = "clk-multiple-parents-mux-test",
615 const char *parents[2] = { "missing-parent", "proper-parent"}; in clk_orphan_transparent_multiple_parent_mux_test_init()
620 return -ENOMEM; in clk_orphan_transparent_multiple_parent_mux_test_init()
621 test->priv = ctx; in clk_orphan_transparent_multiple_parent_mux_test_init()
623 ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("proper-parent", in clk_orphan_transparent_multiple_parent_mux_test_init()
626 ctx->parents_ctx[1].rate = DUMMY_CLOCK_INIT_RATE; in clk_orphan_transparent_multiple_parent_mux_test_init()
627 ret = clk_hw_register_kunit(test, NULL, &ctx->parents_ctx[1].hw); in clk_orphan_transparent_multiple_parent_mux_test_init()
631 ctx->hw.init = CLK_HW_INIT_PARENTS("test-orphan-mux", parents, in clk_orphan_transparent_multiple_parent_mux_test_init()
634 ret = clk_hw_register_kunit(test, NULL, &ctx->hw); in clk_orphan_transparent_multiple_parent_mux_test_init()
648 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_get_parent()
649 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_get_parent()
665 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_parent()
666 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_set_parent()
671 parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_parent()
693 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_drop_range()
694 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_drop_range()
700 parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_drop_range()
727 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_get_rate()
728 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_get_rate()
734 parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_get_rate()
758 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_put()
763 parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_put()
766 clk = clk_hw_get_clk(&ctx->hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_put()
792 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_modified()
793 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_modified()
799 parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_modified()
825 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_untouched()
826 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_untouched()
832 parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_untouched()
842 DUMMY_CLOCK_INIT_RATE - 1000, in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_untouched()
862 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_range_round_rate()
863 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_set_range_round_rate()
871 rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000); in clk_test_orphan_transparent_multiple_parent_mux_set_range_round_rate()
880 * Test that, for a mux that started orphan, was assigned and rate and
891 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_multiple_parent_mux_set_range_set_parent_get_rate()
892 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_multiple_parent_mux_set_range_set_parent_get_rate()
902 parent = clk_hw_get_clk_kunit(test, &ctx->parents_ctx[1].hw, NULL); in clk_test_orphan_transparent_multiple_parent_mux_set_range_set_parent_get_rate()
928 * Test suite for a basic mux clock with two parents. The default parent
929 * isn't registered, only the second parent is. By default, the clock
933 * with an orphan clock, and how we deal with the transition to a valid
937 .name = "clk-orphan-transparent-multiple-parent-mux-test",
954 return -ENOMEM; in clk_single_parent_mux_test_init()
955 test->priv = ctx; in clk_single_parent_mux_test_init()
957 ctx->parent_ctx.rate = DUMMY_CLOCK_INIT_RATE; in clk_single_parent_mux_test_init()
958 ctx->parent_ctx.hw.init = in clk_single_parent_mux_test_init()
959 CLK_HW_INIT_NO_PARENT("parent-clk", in clk_single_parent_mux_test_init()
963 ret = clk_hw_register_kunit(test, NULL, &ctx->parent_ctx.hw); in clk_single_parent_mux_test_init()
967 ctx->hw.init = CLK_HW_INIT("test-clk", "parent-clk", in clk_single_parent_mux_test_init()
971 ret = clk_hw_register_kunit(test, NULL, &ctx->hw); in clk_single_parent_mux_test_init()
981 struct clk_single_parent_ctx *ctx = test->priv; in clk_single_parent_mux_test_exit()
983 clk_hw_unregister(&ctx->hw); in clk_single_parent_mux_test_exit()
984 clk_hw_unregister(&ctx->parent_ctx.hw); in clk_single_parent_mux_test_exit()
988 * Test that for a clock with a single parent, clk_get_parent() actually
994 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_single_parent_mux_get_parent()
995 struct clk_hw *hw = &ctx->hw; in clk_test_single_parent_mux_get_parent()
997 struct clk *parent = clk_hw_get_clk(&ctx->parent_ctx.hw, NULL); in clk_test_single_parent_mux_get_parent()
1006 * Test that for a clock with a single parent, clk_has_parent() actually
1012 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_single_parent_mux_has_parent()
1013 struct clk_hw *hw = &ctx->hw; in clk_test_single_parent_mux_has_parent()
1015 struct clk *parent = clk_hw_get_clk(&ctx->parent_ctx.hw, NULL); in clk_test_single_parent_mux_has_parent()
1024 * Test that for a clock that can't modify its rate and with a single
1028 * FIXME: clk_set_rate_range() only considers the current clock when
1035 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_single_parent_mux_set_range_disjoint_child_last()
1036 struct clk_hw *hw = &ctx->hw; in clk_test_single_parent_mux_set_range_disjoint_child_last()
1054 * Test that for a clock that can't modify its rate and with a single
1058 * FIXME: clk_set_rate_range() only considers the current clock when
1065 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_single_parent_mux_set_range_disjoint_parent_last()
1066 struct clk_hw *hw = &ctx->hw; in clk_test_single_parent_mux_set_range_disjoint_parent_last()
1084 * Test that for a clock that can't modify its rate and with a single
1092 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_single_parent_mux_set_range_round_rate_parent_only()
1093 struct clk_hw *hw = &ctx->hw; in clk_test_single_parent_mux_set_range_round_rate_parent_only()
1105 rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000); in clk_test_single_parent_mux_set_range_round_rate_parent_only()
1114 * Test that for a clock that can't modify its rate and with a single
1122 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_single_parent_mux_set_range_round_rate_child_smaller()
1123 struct clk_hw *hw = &ctx->hw; in clk_test_single_parent_mux_set_range_round_rate_child_smaller()
1135 ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1 + 1000, DUMMY_CLOCK_RATE_2 - 1000); in clk_test_single_parent_mux_set_range_round_rate_child_smaller()
1138 rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000); in clk_test_single_parent_mux_set_range_round_rate_child_smaller()
1141 KUNIT_EXPECT_LE(test, rate, DUMMY_CLOCK_RATE_2 - 1000); in clk_test_single_parent_mux_set_range_round_rate_child_smaller()
1146 KUNIT_EXPECT_LE(test, rate, DUMMY_CLOCK_RATE_2 - 1000); in clk_test_single_parent_mux_set_range_round_rate_child_smaller()
1152 * Test that for a clock that can't modify its rate and with a single
1160 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_single_parent_mux_set_range_round_rate_parent_smaller()
1161 struct clk_hw *hw = &ctx->hw; in clk_test_single_parent_mux_set_range_round_rate_parent_smaller()
1170 ret = clk_set_rate_range(parent, DUMMY_CLOCK_RATE_1 + 1000, DUMMY_CLOCK_RATE_2 - 1000); in clk_test_single_parent_mux_set_range_round_rate_parent_smaller()
1176 rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000); in clk_test_single_parent_mux_set_range_round_rate_parent_smaller()
1179 KUNIT_EXPECT_LE(test, rate, DUMMY_CLOCK_RATE_2 - 1000); in clk_test_single_parent_mux_set_range_round_rate_parent_smaller()
1184 KUNIT_EXPECT_LE(test, rate, DUMMY_CLOCK_RATE_2 - 1000); in clk_test_single_parent_mux_set_range_round_rate_parent_smaller()
1201 * Test suite for a basic mux clock with one parent, with
1209 .name = "clk-single-parent-mux-test",
1223 return -ENOMEM; in clk_orphan_transparent_single_parent_mux_test_init()
1224 test->priv = ctx; in clk_orphan_transparent_single_parent_mux_test_init()
1231 ctx->hw.init = &init; in clk_orphan_transparent_single_parent_mux_test_init()
1233 ret = clk_hw_register(NULL, &ctx->hw); in clk_orphan_transparent_single_parent_mux_test_init()
1240 ctx->parent_ctx.hw.init = &init; in clk_orphan_transparent_single_parent_mux_test_init()
1241 ctx->parent_ctx.rate = DUMMY_CLOCK_INIT_RATE; in clk_orphan_transparent_single_parent_mux_test_init()
1243 ret = clk_hw_register(NULL, &ctx->parent_ctx.hw); in clk_orphan_transparent_single_parent_mux_test_init()
1251 * Test that a mux-only clock, with an initial rate within a range,
1255 * https://lore.kernel.org/linux-clk/7720158d-10a7-a17b-73a4-[email protected]/
1259 struct clk_single_parent_ctx *ctx = test->priv; in clk_test_orphan_transparent_parent_mux_set_range()
1260 struct clk_hw *hw = &ctx->hw; in clk_test_orphan_transparent_parent_mux_set_range()
1269 ctx->parent_ctx.rate - 1000, in clk_test_orphan_transparent_parent_mux_set_range()
1270 ctx->parent_ctx.rate + 1000), in clk_test_orphan_transparent_parent_mux_set_range()
1286 * Test suite for a basic mux clock with one parent. The parent is
1287 * registered after its child. The clock will thus be an orphan when
1290 * These tests make sure a clock that used to be orphan has a sane,
1294 .name = "clk-orphan-transparent-single-parent-test",
1314 return -ENOMEM; in clk_orphan_two_level_root_last_test_init()
1315 test->priv = ctx; in clk_orphan_two_level_root_last_test_init()
1317 ctx->parent_ctx.hw.init = in clk_orphan_two_level_root_last_test_init()
1318 CLK_HW_INIT("intermediate-parent", in clk_orphan_two_level_root_last_test_init()
1319 "root-parent", in clk_orphan_two_level_root_last_test_init()
1322 ret = clk_hw_register(NULL, &ctx->parent_ctx.hw); in clk_orphan_two_level_root_last_test_init()
1326 ctx->hw.init = in clk_orphan_two_level_root_last_test_init()
1327 CLK_HW_INIT("test-clk", "intermediate-parent", in clk_orphan_two_level_root_last_test_init()
1330 ret = clk_hw_register(NULL, &ctx->hw); in clk_orphan_two_level_root_last_test_init()
1334 ctx->parent_parent_ctx.rate = DUMMY_CLOCK_INIT_RATE; in clk_orphan_two_level_root_last_test_init()
1335 ctx->parent_parent_ctx.hw.init = in clk_orphan_two_level_root_last_test_init()
1336 CLK_HW_INIT_NO_PARENT("root-parent", in clk_orphan_two_level_root_last_test_init()
1339 ret = clk_hw_register(NULL, &ctx->parent_parent_ctx.hw); in clk_orphan_two_level_root_last_test_init()
1349 struct clk_single_parent_two_lvl_ctx *ctx = test->priv; in clk_orphan_two_level_root_last_test_exit()
1351 clk_hw_unregister(&ctx->hw); in clk_orphan_two_level_root_last_test_exit()
1352 clk_hw_unregister(&ctx->parent_ctx.hw); in clk_orphan_two_level_root_last_test_exit()
1353 clk_hw_unregister(&ctx->parent_parent_ctx.hw); in clk_orphan_two_level_root_last_test_exit()
1357 * Test that, for a clock whose parent used to be orphan, clk_get_rate()
1363 struct clk_single_parent_two_lvl_ctx *ctx = test->priv; in clk_orphan_two_level_root_last_test_get_rate()
1364 struct clk_hw *hw = &ctx->hw; in clk_orphan_two_level_root_last_test_get_rate()
1375 * Test that, for a clock whose parent used to be orphan,
1380 * https://lore.kernel.org/linux-clk/366a0232-bb4a-c357-6aa8-[email protected]/
1385 struct clk_single_parent_two_lvl_ctx *ctx = test->priv; in clk_orphan_two_level_root_last_test_set_range()
1386 struct clk_hw *hw = &ctx->hw; in clk_orphan_two_level_root_last_test_set_range()
1392 DUMMY_CLOCK_INIT_RATE - 1000, in clk_orphan_two_level_root_last_test_set_range()
1411 * Test suite for a basic, transparent, clock with a parent that is also
1412 * such a clock. The parent's parent is registered last, while the
1415 * clock itself will always have its parent and will never be
1419 * with an orphan clock, and how we deal with the transition to a valid
1424 .name = "clk-orphan-two-level-root-last-test",
1432 * and that it will make sure the rate of the clock is within the
1437 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range()
1438 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range()
1462 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_invalid()
1463 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_invalid()
1481 struct clk_dummy_context *ctx = test->priv; in clk_range_test_multiple_disjoints_range()
1482 struct clk_hw *hw = &ctx->hw; in clk_range_test_multiple_disjoints_range()
1504 * Test that if our clock has some boundaries and we try to round a rate
1509 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_round_rate_lower()
1510 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_round_rate_lower()
1520 rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000); in clk_range_test_set_range_round_rate_lower()
1529 * Test that if our clock has some boundaries and we try to set a rate
1534 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_set_rate_lower()
1535 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_set_rate_lower()
1546 clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000), in clk_range_test_set_range_set_rate_lower()
1558 * Test that if our clock has some boundaries and we try to round and
1565 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_set_round_rate_consistent_lower()
1566 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_set_round_rate_consistent_lower()
1576 rounded = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000); in clk_range_test_set_range_set_round_rate_consistent_lower()
1580 clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000), in clk_range_test_set_range_set_round_rate_consistent_lower()
1589 * Test that if our clock has some boundaries and we try to round a rate
1594 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_round_rate_higher()
1595 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_round_rate_higher()
1614 * Test that if our clock has some boundaries and we try to set a rate
1619 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_set_rate_higher()
1620 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_set_rate_higher()
1643 * Test that if our clock has some boundaries and we try to round and
1650 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_set_round_rate_consistent_higher()
1651 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_set_round_rate_consistent_higher()
1674 * Test that if our clock has a rate lower than the minimum set by a
1683 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_get_rate_raised()
1684 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_get_rate_raised()
1689 clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000), in clk_range_test_set_range_get_rate_raised()
1706 * Test that if our clock has a rate higher than the maximum set by a
1715 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_get_rate_lowered()
1716 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_get_rate_lowered()
1753 * Test suite for a basic rate clock, without any parent.
1759 .name = "clk-range-test",
1775 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_rate_maximized()
1776 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_rate_maximized()
1797 DUMMY_CLOCK_RATE_2 - 1000), in clk_range_test_set_range_rate_maximized()
1802 KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_2 - 1000); in clk_range_test_set_range_rate_maximized()
1827 struct clk_dummy_context *ctx = test->priv; in clk_range_test_multiple_set_range_rate_maximized()
1828 struct clk_hw *hw = &ctx->hw; in clk_range_test_multiple_set_range_rate_maximized()
1879 * whether a new rate is needed, including when a user drop its clock.
1886 struct clk_dummy_context *ctx = test->priv; in clk_range_test_multiple_set_range_rate_put_maximized()
1887 struct clk_hw *hw = &ctx->hw; in clk_range_test_multiple_set_range_rate_put_maximized()
1940 * Test suite for a basic rate clock, without any parent.
1947 .name = "clk-range-maximize-test",
1963 struct clk_dummy_context *ctx = test->priv; in clk_range_test_set_range_rate_minimized()
1964 struct clk_hw *hw = &ctx->hw; in clk_range_test_set_range_rate_minimized()
1969 clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000), in clk_range_test_set_range_rate_minimized()
2015 struct clk_dummy_context *ctx = test->priv; in clk_range_test_multiple_set_range_rate_minimized()
2016 struct clk_hw *hw = &ctx->hw; in clk_range_test_multiple_set_range_rate_minimized()
2063 * whether a new rate is needed, including when a user drop its clock.
2070 struct clk_dummy_context *ctx = test->priv; in clk_range_test_multiple_set_range_rate_put_minimized()
2071 struct clk_hw *hw = &ctx->hw; in clk_range_test_multiple_set_range_rate_put_minimized()
2120 * Test suite for a basic rate clock, without any parent.
2127 .name = "clk-range-minimize-test",
2145 struct clk_rate_request *parent_req = ctx->req; in clk_leaf_mux_determine_rate()
2147 clk_hw_forward_rate_request(hw, req, req->best_parent_hw, parent_req, req->rate); in clk_leaf_mux_determine_rate()
2148 ret = ctx->determine_rate_func(req->best_parent_hw, parent_req); in clk_leaf_mux_determine_rate()
2152 req->rate = parent_req->rate; in clk_leaf_mux_determine_rate()
2167 const char *top_parents[2] = { "parent-0", "parent-1" }; in clk_leaf_mux_set_rate_parent_test_init()
2172 return -ENOMEM; in clk_leaf_mux_set_rate_parent_test_init()
2173 test->priv = ctx; in clk_leaf_mux_set_rate_parent_test_init()
2175 ctx->mux_ctx.parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0", in clk_leaf_mux_set_rate_parent_test_init()
2178 ctx->mux_ctx.parents_ctx[0].rate = DUMMY_CLOCK_RATE_1; in clk_leaf_mux_set_rate_parent_test_init()
2179 ret = clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[0].hw); in clk_leaf_mux_set_rate_parent_test_init()
2183 ctx->mux_ctx.parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1", in clk_leaf_mux_set_rate_parent_test_init()
2186 ctx->mux_ctx.parents_ctx[1].rate = DUMMY_CLOCK_RATE_2; in clk_leaf_mux_set_rate_parent_test_init()
2187 ret = clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[1].hw); in clk_leaf_mux_set_rate_parent_test_init()
2191 ctx->mux_ctx.current_parent = 0; in clk_leaf_mux_set_rate_parent_test_init()
2192 ctx->mux_ctx.hw.init = CLK_HW_INIT_PARENTS("test-mux", top_parents, in clk_leaf_mux_set_rate_parent_test_init()
2195 ret = clk_hw_register(NULL, &ctx->mux_ctx.hw); in clk_leaf_mux_set_rate_parent_test_init()
2199 ctx->parent.init = CLK_HW_INIT_HW("test-parent", &ctx->mux_ctx.hw, in clk_leaf_mux_set_rate_parent_test_init()
2201 ret = clk_hw_register(NULL, &ctx->parent); in clk_leaf_mux_set_rate_parent_test_init()
2205 ctx->hw.init = CLK_HW_INIT_HW("test-clock", &ctx->parent, in clk_leaf_mux_set_rate_parent_test_init()
2208 ret = clk_hw_register(NULL, &ctx->hw); in clk_leaf_mux_set_rate_parent_test_init()
2217 struct clk_leaf_mux_ctx *ctx = test->priv; in clk_leaf_mux_set_rate_parent_test_exit()
2219 clk_hw_unregister(&ctx->hw); in clk_leaf_mux_set_rate_parent_test_exit()
2220 clk_hw_unregister(&ctx->parent); in clk_leaf_mux_set_rate_parent_test_exit()
2221 clk_hw_unregister(&ctx->mux_ctx.hw); in clk_leaf_mux_set_rate_parent_test_exit()
2222 clk_hw_unregister(&ctx->mux_ctx.parents_ctx[0].hw); in clk_leaf_mux_set_rate_parent_test_exit()
2223 clk_hw_unregister(&ctx->mux_ctx.parents_ctx[1].hw); in clk_leaf_mux_set_rate_parent_test_exit()
2235 strcpy(desc, t->desc); in clk_leaf_mux_set_rate_parent_determine_rate_test_case_to_desc()
2294 struct clk_leaf_mux_ctx *ctx = test->priv; in KUNIT_ARRAY_PARAM()
2295 struct clk_hw *hw = &ctx->hw; in KUNIT_ARRAY_PARAM()
2301 test_param = test->param_value; in KUNIT_ARRAY_PARAM()
2302 ctx->determine_rate_func = test_param->determine_rate_func; in KUNIT_ARRAY_PARAM()
2304 ctx->req = &req; in KUNIT_ARRAY_PARAM()
2311 KUNIT_EXPECT_PTR_EQ(test, req.best_parent_hw, &ctx->mux_ctx.hw); in KUNIT_ARRAY_PARAM()
2323 * Test suite for a clock whose parent is a pass-through clk whose parent is a
2324 * mux with multiple parents. The leaf and pass-through clocks have the
2332 .name = "clk-leaf-mux-set-rate-parent",
2364 ctx->pre_rate_change.old_rate = clk_data->old_rate; in clk_mux_notifier_callback()
2365 ctx->pre_rate_change.new_rate = clk_data->new_rate; in clk_mux_notifier_callback()
2366 ctx->pre_rate_change.done = true; in clk_mux_notifier_callback()
2367 wake_up_interruptible(&ctx->pre_rate_change.wq); in clk_mux_notifier_callback()
2371 ctx->post_rate_change.old_rate = clk_data->old_rate; in clk_mux_notifier_callback()
2372 ctx->post_rate_change.new_rate = clk_data->new_rate; in clk_mux_notifier_callback()
2373 ctx->post_rate_change.done = true; in clk_mux_notifier_callback()
2374 wake_up_interruptible(&ctx->post_rate_change.wq); in clk_mux_notifier_callback()
2383 const char *top_parents[2] = { "parent-0", "parent-1" }; in clk_mux_notifier_test_init()
2388 return -ENOMEM; in clk_mux_notifier_test_init()
2389 test->priv = ctx; in clk_mux_notifier_test_init()
2390 ctx->clk_nb.notifier_call = clk_mux_notifier_callback; in clk_mux_notifier_test_init()
2391 init_waitqueue_head(&ctx->pre_rate_change.wq); in clk_mux_notifier_test_init()
2392 init_waitqueue_head(&ctx->post_rate_change.wq); in clk_mux_notifier_test_init()
2394 ctx->mux_ctx.parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0", in clk_mux_notifier_test_init()
2397 ctx->mux_ctx.parents_ctx[0].rate = DUMMY_CLOCK_RATE_1; in clk_mux_notifier_test_init()
2398 ret = clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[0].hw); in clk_mux_notifier_test_init()
2402 ctx->mux_ctx.parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1", in clk_mux_notifier_test_init()
2405 ctx->mux_ctx.parents_ctx[1].rate = DUMMY_CLOCK_RATE_2; in clk_mux_notifier_test_init()
2406 ret = clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[1].hw); in clk_mux_notifier_test_init()
2410 ctx->mux_ctx.current_parent = 0; in clk_mux_notifier_test_init()
2411 ctx->mux_ctx.hw.init = CLK_HW_INIT_PARENTS("test-mux", top_parents, in clk_mux_notifier_test_init()
2414 ret = clk_hw_register(NULL, &ctx->mux_ctx.hw); in clk_mux_notifier_test_init()
2418 ctx->clk = clk_hw_get_clk(&ctx->mux_ctx.hw, NULL); in clk_mux_notifier_test_init()
2419 ret = clk_notifier_register(ctx->clk, &ctx->clk_nb); in clk_mux_notifier_test_init()
2428 struct clk_mux_notifier_ctx *ctx = test->priv; in clk_mux_notifier_test_exit()
2429 struct clk *clk = ctx->clk; in clk_mux_notifier_test_exit()
2431 clk_notifier_unregister(clk, &ctx->clk_nb); in clk_mux_notifier_test_exit()
2434 clk_hw_unregister(&ctx->mux_ctx.hw); in clk_mux_notifier_test_exit()
2435 clk_hw_unregister(&ctx->mux_ctx.parents_ctx[0].hw); in clk_mux_notifier_test_exit()
2436 clk_hw_unregister(&ctx->mux_ctx.parents_ctx[1].hw); in clk_mux_notifier_test_exit()
2442 * old and new rates.
2446 struct clk_mux_notifier_ctx *ctx = test->priv; in clk_mux_notifier_set_parent_test()
2447 struct clk_hw *hw = &ctx->mux_ctx.hw; in clk_mux_notifier_set_parent_test()
2449 struct clk *new_parent = clk_hw_get_clk(&ctx->mux_ctx.parents_ctx[1].hw, NULL); in clk_mux_notifier_set_parent_test()
2455 ret = wait_event_interruptible_timeout(ctx->pre_rate_change.wq, in clk_mux_notifier_set_parent_test()
2456 ctx->pre_rate_change.done, in clk_mux_notifier_set_parent_test()
2460 KUNIT_EXPECT_EQ(test, ctx->pre_rate_change.old_rate, DUMMY_CLOCK_RATE_1); in clk_mux_notifier_set_parent_test()
2461 KUNIT_EXPECT_EQ(test, ctx->pre_rate_change.new_rate, DUMMY_CLOCK_RATE_2); in clk_mux_notifier_set_parent_test()
2463 ret = wait_event_interruptible_timeout(ctx->post_rate_change.wq, in clk_mux_notifier_set_parent_test()
2464 ctx->post_rate_change.done, in clk_mux_notifier_set_parent_test()
2468 KUNIT_EXPECT_EQ(test, ctx->post_rate_change.old_rate, DUMMY_CLOCK_RATE_1); in clk_mux_notifier_set_parent_test()
2469 KUNIT_EXPECT_EQ(test, ctx->post_rate_change.new_rate, DUMMY_CLOCK_RATE_2); in clk_mux_notifier_set_parent_test()
2487 .name = "clk-mux-notifier",
2497 const char *parents[2] = { "parent-0", "parent-1"}; in clk_mux_no_reparent_test_init()
2502 return -ENOMEM; in clk_mux_no_reparent_test_init()
2503 test->priv = ctx; in clk_mux_no_reparent_test_init()
2505 ctx->parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0", in clk_mux_no_reparent_test_init()
2508 ctx->parents_ctx[0].rate = DUMMY_CLOCK_RATE_1; in clk_mux_no_reparent_test_init()
2509 ret = clk_hw_register(NULL, &ctx->parents_ctx[0].hw); in clk_mux_no_reparent_test_init()
2513 ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1", in clk_mux_no_reparent_test_init()
2516 ctx->parents_ctx[1].rate = DUMMY_CLOCK_RATE_2; in clk_mux_no_reparent_test_init()
2517 ret = clk_hw_register(NULL, &ctx->parents_ctx[1].hw); in clk_mux_no_reparent_test_init()
2521 ctx->current_parent = 0; in clk_mux_no_reparent_test_init()
2522 ctx->hw.init = CLK_HW_INIT_PARENTS("test-mux", parents, in clk_mux_no_reparent_test_init()
2525 ret = clk_hw_register(NULL, &ctx->hw); in clk_mux_no_reparent_test_init()
2535 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_mux_no_reparent_test_exit()
2537 clk_hw_unregister(&ctx->hw); in clk_mux_no_reparent_test_exit()
2538 clk_hw_unregister(&ctx->parents_ctx[0].hw); in clk_mux_no_reparent_test_exit()
2539 clk_hw_unregister(&ctx->parents_ctx[1].hw); in clk_mux_no_reparent_test_exit()
2549 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_mux_no_reparent_round_rate()
2550 struct clk_hw *hw = &ctx->hw; in clk_mux_no_reparent_round_rate()
2563 other_parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_mux_no_reparent_round_rate()
2585 struct clk_multiple_parent_ctx *ctx = test->priv; in clk_mux_no_reparent_set_rate()
2586 struct clk_hw *hw = &ctx->hw; in clk_mux_no_reparent_set_rate()
2600 other_parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); in clk_mux_no_reparent_set_rate()
2625 * Test suite for a clock mux that isn't allowed to change parent, using
2629 * rates and parents.
2632 .name = "clk-mux-no-reparent",
2647 strcpy(desc, t->desc); in clk_register_clk_parent_data_test_case_to_desc()
2675 .pdata.index = -1,
2716 * struct clk_register_clk_parent_data_of_ctx - Context for clk_parent_data OF tests
2734 return -ENOMEM; in clk_register_clk_parent_data_of_test_init()
2735 test->priv = ctx; in clk_register_clk_parent_data_of_test_init()
2737 ctx->np = of_find_compatible_node(NULL, NULL, "test,clk-parent-data"); in clk_register_clk_parent_data_of_test_init()
2738 if (!ctx->np) in clk_register_clk_parent_data_of_test_init()
2739 return -ENODEV; in clk_register_clk_parent_data_of_test_init()
2741 of_node_put_kunit(test, ctx->np); in clk_register_clk_parent_data_of_test_init()
2752 struct clk_register_clk_parent_data_of_ctx *ctx = test->priv; in clk_register_clk_parent_data_of_test()
2758 KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->np); in clk_register_clk_parent_data_of_test()
2760 expected_parent = of_clk_get_kunit(test, ctx->np, 0); in clk_register_clk_parent_data_of_test()
2763 test_param = test->param_value; in clk_register_clk_parent_data_of_test()
2764 init.parent_data = &test_param->pdata; in clk_register_clk_parent_data_of_test()
2768 ctx->hw.init = &init; in clk_register_clk_parent_data_of_test()
2769 KUNIT_ASSERT_EQ(test, 0, of_clk_hw_register_kunit(test, ctx->np, &ctx->hw)); in clk_register_clk_parent_data_of_test()
2771 parent_hw = clk_hw_get_parent(&ctx->hw); in clk_register_clk_parent_data_of_test()
2797 * struct clk_register_clk_parent_data_device_ctx - Context for clk_parent_data device tests
2811 return container_of(to_platform_driver(pdev->dev.driver), in clk_register_clk_parent_data_driver_to_test_context()
2820 ctx->dev = &pdev->dev; in clk_register_clk_parent_data_device_probe()
2827 struct clk_register_clk_parent_data_device_ctx *ctx = test->priv; in clk_register_clk_parent_data_device_driver()
2829 { .compatible = "test,clk-parent-data" }, in clk_register_clk_parent_data_device_driver()
2833 ctx->pdrv.probe = clk_register_clk_parent_data_device_probe; in clk_register_clk_parent_data_device_driver()
2834 ctx->pdrv.driver.of_match_table = match_table; in clk_register_clk_parent_data_device_driver()
2835 ctx->pdrv.driver.name = __func__; in clk_register_clk_parent_data_device_driver()
2836 ctx->pdrv.driver.owner = THIS_MODULE; in clk_register_clk_parent_data_device_driver()
2838 KUNIT_ASSERT_EQ(test, 0, kunit_platform_driver_register(test, &ctx->pdrv)); in clk_register_clk_parent_data_device_driver()
2839 KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->dev); in clk_register_clk_parent_data_device_driver()
2867 .pdata.index = -1,
2920 test->priv = ctx; in KUNIT_ARRAY_PARAM()
2924 expected_parent = clk_get_kunit(test, ctx->dev, "50"); in KUNIT_ARRAY_PARAM()
2927 test_param = test->param_value; in KUNIT_ARRAY_PARAM()
2928 init.parent_data = &test_param->pdata; in KUNIT_ARRAY_PARAM()
2932 ctx->hw.init = &init; in KUNIT_ARRAY_PARAM()
2933 KUNIT_ASSERT_EQ(test, 0, clk_hw_register_kunit(test, ctx->dev, &ctx->hw)); in KUNIT_ARRAY_PARAM()
2935 parent_hw = clk_hw_get_parent(&ctx->hw); in KUNIT_ARRAY_PARAM()
2953 .pdata.index = -1,
2972 .pdata.index = -1,
3028 test->priv = ctx; in KUNIT_ARRAY_PARAM()
3035 parent_hw = &parent->hw; in KUNIT_ARRAY_PARAM()
3036 parent_hw->init = CLK_HW_INIT_NO_PARENT("parent-clk", in KUNIT_ARRAY_PARAM()
3039 KUNIT_ASSERT_EQ(test, 0, clk_hw_register_kunit(test, ctx->dev, parent_hw)); in KUNIT_ARRAY_PARAM()
3041 test_param = test->param_value; in KUNIT_ARRAY_PARAM()
3042 memcpy(&pdata, &test_param->pdata, sizeof(pdata)); in KUNIT_ARRAY_PARAM()
3048 ctx->hw.init = &init; in KUNIT_ARRAY_PARAM()
3049 KUNIT_ASSERT_EQ(test, 0, clk_hw_register_kunit(test, ctx->dev, &ctx->hw)); in KUNIT_ARRAY_PARAM()
3051 KUNIT_EXPECT_PTR_EQ(test, parent_hw, clk_hw_get_parent(&ctx->hw)); in KUNIT_ARRAY_PARAM()
3086 * struct clk_assigned_rates_test_param - Test parameters for clk_assigned_rates test
3117 ctx->hw.init = &init; in clk_assigned_rates_register_clk()
3118 ctx->rate = rate; in clk_assigned_rates_register_clk()
3120 KUNIT_ASSERT_EQ(test, 0, of_clk_hw_register_kunit(test, np, &ctx->hw)); in clk_assigned_rates_register_clk()
3121 KUNIT_ASSERT_EQ(test, ctx->rate, rate); in clk_assigned_rates_register_clk()
3143 test_param = test->param_value; in clk_assigned_rates_test_init()
3146 test_param->overlay_begin, in clk_assigned_rates_test_init()
3147 test_param->overlay_end)); in clk_assigned_rates_test_init()
3151 test->priv = ctx; in clk_assigned_rates_test_init()
3154 np = of_find_compatible_node(NULL, NULL, "test,clk-assigned-rates")); in clk_assigned_rates_test_init()
3157 KUNIT_ASSERT_EQ(test, 0, of_property_read_u32(np, "#clock-cells", &clk_cells)); in clk_assigned_rates_test_init()
3158 /* Only support #clock-cells = <0> or <1> */ in clk_assigned_rates_test_init()
3161 clk_assigned_rates_register_clk(test, &ctx->clk0, np, in clk_assigned_rates_test_init()
3162 "test_assigned_rate0", test_param->rate0); in clk_assigned_rates_test_init()
3166 &ctx->clk0.hw)); in clk_assigned_rates_test_init()
3168 clk_assigned_rates_register_clk(test, &ctx->clk1, np, in clk_assigned_rates_test_init()
3169 "test_assigned_rate1", test_param->rate1); in clk_assigned_rates_test_init()
3173 data->num = 2; in clk_assigned_rates_test_init()
3174 data->hws[0] = &ctx->clk0.hw; in clk_assigned_rates_test_init()
3175 data->hws[1] = &ctx->clk1.hw; in clk_assigned_rates_test_init()
3182 if (test_param->consumer_test) { in clk_assigned_rates_test_init()
3184 consumer = of_find_compatible_node(NULL, NULL, "test,clk-consumer")); in clk_assigned_rates_test_init()
3195 struct clk_assigned_rates_context *ctx = test->priv; in clk_assigned_rates_assigns_one()
3197 KUNIT_EXPECT_EQ(test, ctx->clk0.rate, ASSIGNED_RATES_0_RATE); in clk_assigned_rates_assigns_one()
3202 struct clk_assigned_rates_context *ctx = test->priv; in clk_assigned_rates_assigns_multiple()
3204 KUNIT_EXPECT_EQ(test, ctx->clk0.rate, ASSIGNED_RATES_0_RATE); in clk_assigned_rates_assigns_multiple()
3205 KUNIT_EXPECT_EQ(test, ctx->clk1.rate, ASSIGNED_RATES_1_RATE); in clk_assigned_rates_assigns_multiple()
3210 struct clk_assigned_rates_context *ctx = test->priv; in clk_assigned_rates_skips()
3211 const struct clk_assigned_rates_test_param *test_param = test->param_value; in clk_assigned_rates_skips()
3213 KUNIT_EXPECT_NE(test, ctx->clk0.rate, ASSIGNED_RATES_0_RATE); in clk_assigned_rates_skips()
3214 KUNIT_EXPECT_EQ(test, ctx->clk0.rate, test_param->rate0); in clk_assigned_rates_skips()
3226 * Test that a single cell assigned-clock-rates property
3234 * Test that a single cell assigned-clock-rates property
3243 * Test that a single cell assigned-clock-rates-u64 property
3246 .desc = "provider assigns u64",
3251 * Test that a single cell assigned-clock-rates-u64 property
3254 .desc = "consumer assigns u64",
3267 /* Test cases that assign multiple rates */
3271 * Test that a multiple cell assigned-clock-rates property
3272 * assigns the rates when the property is in the provider.
3279 * Test that a multiple cell assigned-clock-rates property
3280 * assigns the rates when the property is in the consumer.
3288 * Test that a single cell assigned-clock-rates-u64 property
3291 .desc = "provider assigns u64",
3296 * Test that a multiple cell assigned-clock-rates-u64 property
3297 * assigns the rates when the property is in the consumer.
3299 .desc = "consumer assigns u64",
3319 * Test that an assigned-clock-rates property without an assigned-clocks
3322 .desc = "provider missing assigned-clocks",
3328 * Test that an assigned-clock-rates property without an assigned-clocks
3331 .desc = "consumer missing assigned-clocks",
3338 * Test that an assigned-clock-rates property of zero doesn't
3341 .desc = "provider assigned-clock-rates of zero",
3347 * Test that an assigned-clock-rates property of zero doesn't
3350 .desc = "consumer assigned-clock-rates of zero",
3357 * Test that an assigned-clocks property with a null phandle
3360 .desc = "provider assigned-clocks null phandle",
3366 * Test that an assigned-clocks property with a null phandle
3369 .desc = "provider assigned-clocks null phandle",
3390 * Test suite for assigned-clock-rates{-u64} DT property.