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/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_vmc.h48 /** @brief Power configuration bits for each section in particular RAM block. */
51 … VMC_RAM_POWER_S0POWER_Msk, ///< Keep retention on RAM section S0 of the particular RAM block when…
52 … VMC_RAM_POWER_S1POWER_Msk, ///< Keep retention on RAM section S1 of the particular RAM block when…
53 … VMC_RAM_POWER_S2POWER_Msk, ///< Keep retention on RAM section S2 of the particular RAM block when…
54 … VMC_RAM_POWER_S3POWER_Msk, ///< Keep retention on RAM section S3 of the particular RAM block when…
57 /** @brief Retention configuration bits for each section in particular RAM block. */
60 …_RETENTION_S0 = VMC_RAM_POWER_S0RETENTION_Msk, ///< Keep RAM section S0 of the particular RAM blo…
61 …_RETENTION_S1 = VMC_RAM_POWER_S1RETENTION_Msk, ///< Keep RAM section S1 of the particular RAM blo…
62 …_RETENTION_S2 = VMC_RAM_POWER_S2RETENTION_Msk, ///< Keep RAM section S2 of the particular RAM blo…
63 …_RETENTION_S3 = VMC_RAM_POWER_S3RETENTION_Msk, ///< Keep RAM section S3 of the particular RAM blo…
[all …]
H A Dnrf_power.h159 * @brief RAM blocks numbers
163 * Ram blocks has to been used in nrf51.
164 * In new CPU ram is divided into segments and this functionality is depreciated.
165 * For the newer MCU see the PS for mapping between internal RAM and RAM blocks,
178 * @brief RAM blocks masks
192 * @brief RAM power state position of the bits
198 NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
199 NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */
200 NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
201 NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */
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H A Dnrf_spu.h51 …PU_Type, EVENTS_RAMACCERR), ///< A security violation has been detected for the RAM memory space.
215 * @brief Function for configuring non-secure callable RAM region.
218 * @param[in] ram_nsc_id Non-secure callable RAM region ID.
219 * @param[in] ram_nsc_size Non-secure callable RAM region size.
220 * @param[in] region_number RAM region number.
247 * @brief Function for configuring security for the RAM region.
252 * @param[in] region_id RAM region index.
254 * @param[in] permissions RAM region permissions.
269 * @param[in] secure_dma DMA transfers possible only from RAM memory in secure domain.
H A Dnrf_usbd.h89 … EVENTS_ENDEPIN[0] ), /**< The whole EPIN[0] buffer has been consumed. The RAM buffer can be acces…
90 … EVENTS_ENDEPIN[1] ), /**< The whole EPIN[1] buffer has been consumed. The RAM buffer can be acces…
91 … EVENTS_ENDEPIN[2] ), /**< The whole EPIN[2] buffer has been consumed. The RAM buffer can be acces…
92 … EVENTS_ENDEPIN[3] ), /**< The whole EPIN[3] buffer has been consumed. The RAM buffer can be acces…
93 … EVENTS_ENDEPIN[4] ), /**< The whole EPIN[4] buffer has been consumed. The RAM buffer can be acces…
94 … EVENTS_ENDEPIN[5] ), /**< The whole EPIN[5] buffer has been consumed. The RAM buffer can be acces…
95 … EVENTS_ENDEPIN[6] ), /**< The whole EPIN[6] buffer has been consumed. The RAM buffer can be acces…
96 … EVENTS_ENDEPIN[7] ), /**< The whole EPIN[7] buffer has been consumed. The RAM buffer can be acces…
98 …e, EVENTS_ENDISOIN ), /**< The whole ISOIN buffer has been consumed. The RAM buffer can be acces…
99 …EVENTS_ENDEPOUT[0]), /**< The whole EPOUT[0] buffer has been consumed. The RAM buffer can be acces…
[all …]
H A Dnrf_pdm.h71 …le specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM.
101 …DE_OPERATION_Stereo, ///< Sample and store one pair (Left + Right) of 16-bit samples per RAM word.
102 …DE_OPERATION_Mono ///< Sample and store two successive Left samples (16 bit each) per RAM word.
299 * @param[in] p_buffer Pointer to the RAM address where samples should be written with EasyDMA.
302 * The amount of allocated RAM depends on the operation mode.
/nrf52832-nimble/rt-thread/components/net/lwip-1.4.1/src/core/
H A Dmem.c157 /** index (-> ram[next]) of the next struct */
159 /** index (-> ram[prev]) of the previous struct */
167 * larger values could prevent too small blocks to fragment the RAM too much. */
186 /** pointer to the heap (ram_heap): for alignment, ram is now a pointer instead of an array */
187 static u8_t *ram; variable
241 LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); in plug_holes()
248 nmem = (struct mem *)(void *)&ram[mem->next]; in plug_holes()
250 /* if mem->next is unused and not end of ram, combine mem and mem->next */ in plug_holes()
255 ((struct mem *)(void *)&ram[nmem->next])->prev = (mem_size_t)((u8_t *)mem - ram); in plug_holes()
259 pmem = (struct mem *)(void *)&ram[mem->prev]; in plug_holes()
[all …]
/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/src/core/
H A Dmem.c265 /** index (-> ram[next]) of the next struct */
267 /** index (-> ram[prev]) of the previous struct */
275 * larger values could prevent too small blocks to fragment the RAM too much. */
294 /** pointer to the heap (ram_heap): for alignment, ram is now a pointer instead of an array */
295 static u8_t *ram; variable
349 LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); in plug_holes()
356 nmem = (struct mem *)(void *)&ram[mem->next]; in plug_holes()
358 /* if mem->next is unused and not end of ram, combine mem and mem->next */ in plug_holes()
363 ((struct mem *)(void *)&ram[nmem->next])->prev = (mem_size_t)((u8_t *)mem - ram); in plug_holes()
367 pmem = (struct mem *)(void *)&ram[mem->prev]; in plug_holes()
[all …]
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf91_common.ld21 * with other linker script that defines memory regions FLASH and RAM.
127 } > RAM
137 } > RAM
145 } > RAM
153 } > RAM
155 /* Set stack top to end of RAM, and stack limit move down by
157 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
161 /* Check if data + heap + stack exceeds RAM limit */
162 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
H A Dnrf_common.ld21 * with other linker script that defines memory regions FLASH and RAM.
124 } > RAM
134 } > RAM
143 } > RAM
151 } > RAM
153 /* Set stack top to end of RAM, and stack limit move down by
155 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
159 /* Check if data + heap + stack exceeds RAM limit */
160 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
H A Dnrf52_common.ld23 * with other linker script that defines memory regions FLASH and RAM.
126 } > RAM
136 } > RAM
145 } > RAM
153 } > RAM
155 /* Set stack top to end of RAM, and stack limit move down by
157 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
161 /* Check if data + heap + stack exceeds RAM limit */
162 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
H A Dnrf51_common.ld23 * with other linker script that defines memory regions FLASH and RAM.
126 } > RAM
136 } > RAM
145 } > RAM
153 } > RAM
155 /* Set stack top to end of RAM, and stack limit move down by
157 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
161 /* Check if data + heap + stack exceeds RAM limit */
162 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
H A Diar_startup_nrf51.s26 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
127 NRF_POWER_RAMONx_RAMxON_ONMODE_Msk EQU 0x3 ; All RAM blocks on in onmode bit mask
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/core/
H A Dmem.c350 /** index (-> ram[next]) of the next struct */
352 /** index (-> ram[prev]) of the previous struct */
364 * larger values could prevent too small blocks to fragment the RAM too much. */
383 /** pointer to the heap (ram_heap): for alignment, ram is now a pointer instead of an array */
384 static u8_t *ram; variable
453 return (struct mem *)(void *)&ram[ptr]; in ptr_to_mem()
459 return (mem_size_t)((u8_t *)mem - ram); in mem_to_ptr()
479 LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); in plug_holes()
488 /* if mem->next is unused and not end of ram, combine mem and mem->next */ in plug_holes()
524 ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER); in mem_init()
[all …]
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/store/ram/
H A Dpkg.yml20 pkg.name: nimble/host/store/ram
22 DEPRECATED; for a RAM-only BLE store, use store/config and set
23 BLE_STORE_CONFIG_PERSIST to 0. RAM-based persistence layer for the NimBLE
/nrf52832-nimble/rt-thread/libcpu/ppc/ppc405/
H A Dcache_gcc.S33 sync /* wait for dcbst's to get to ram */
62 sync /* wait for dcbst's to get to ram */
84 sync /* wait for dcbst's to get to ram */
107 sync /* wait for dcbi's to get to ram */
/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_twis.h252 * to be placed in the Data RAM region. If this condition is not met,
257 * @attention Transmission buffer has to be placed in RAM.
261 * @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM.
287 * to be placed in the Data RAM region. If this condition is not met,
292 * @attention Receiving buffer has to be placed in RAM.
296 * @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM.
/nrf52832-nimble/packages/NimBLE-latest/nimble/transport/
H A Dsyscfg.yml23 This is virtually the same as enabling RAM HCI transport and
30 description: Enables RAM HCI transport package
H A Dpkg.yml29 - nimble/transport/ram
36 - nimble/transport/ram
/nrf52832-nimble/packages/NimBLE-latest/
H A DSConscript20 cwd + '/nimble/host/store/ram/include',
77 nimble/host/store/ram/src/ble_store_ram.c
119 cwd + '/nimble/transport/ram/include',
124 nimble/transport/ram/src/ble_hci_ram.c
/nrf52832-nimble/packages/NimBLE-latest/apps/blemesh_shell/
H A Dpkg.yml36 - nimble/host/store/ram
37 - nimble/transport/ram
/nrf52832-nimble/packages/NimBLE-latest/apps/blemesh_light/
H A Dpkg.yml36 - nimble/host/store/ram
37 - nimble/transport/ram
/nrf52832-nimble/packages/NimBLE-latest/apps/blecent/
H A Dpkg.yml36 - nimble/host/store/ram
37 - nimble/transport/ram
/nrf52832-nimble/packages/NimBLE-latest/apps/blemesh/
H A Dpkg.yml36 - nimble/host/store/ram
37 - nimble/transport/ram
/nrf52832-nimble/packages/NimBLE-latest/apps/bleuart/
H A Dpkg.yml32 - "@apache-mynewt-nimble/nimble/host/store/ram"
33 - "@apache-mynewt-nimble/nimble/transport/ram"
/nrf52832-nimble/rt-thread/components/net/lwip-1.4.1/doc/
H A Dsnmp_agent.txt172 to preserve precious RAM on small microcontrollers.
173 However RAM location is possible for a dynamically
177 turn use dynamically allocated index trees from RAM.

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