/linux-6.14.4/Documentation/devicetree/bindings/timer/ |
D | sifive,clint.yaml | 4 $id: http://devicetree.org/schemas/timer/sifive,clint.yaml# 15 Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor 18 interrupt controller is the parent interrupt controller for CLINT device. 19 The clock frequency of CLINT is specified via "timebase-frequency" DT 23 T-Head C906/C910 CPU cores include an implementation of CLINT too, however 32 - canaan,k210-clint # Canaan Kendryte K210 33 - sifive,fu540-c000-clint # SiFive FU540 34 - spacemit,k1-clint # SpacemiT K1 35 - starfive,jh7100-clint # StarFive JH7100 36 - starfive,jh7110-clint # StarFive JH7110 [all …]
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D | thead,c900-aclint-mtimer.yaml | 7 title: Sophgo CLINT Timer
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/linux-6.14.4/drivers/clocksource/ |
D | timer-clint.c | 6 * CLINT MMIO timer device. 9 #define pr_fmt(fmt) "clint: " fmt 28 #include <asm/clint.h> 35 /* CLINT manages IPI and Timer for RISC-V M-mode */ 172 * Ensure that CLINT device interrupts are either RV_IRQ_TIMER or in clint_timer_init_dt() 203 /* If CLINT ipi or timer irq not found then fail */ in clint_timer_init_dt() 239 "clint-timer", &clint_clock_event); in clint_timer_init_dt() 259 "clockevents/clint/timer:starting", in clint_timer_init_dt()
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D | Kconfig | 656 bool "CLINT Timer for the RISC-V platform" if COMPILE_TEST 661 This option enables the CLINT timer for RISC-V systems. The CLINT
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D | Makefile | 84 obj-$(CONFIG_CLINT_TIMER) += timer-clint.o
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/linux-6.14.4/arch/riscv/boot/dts/sophgo/ |
D | cv1800b.dtsi | 31 &clint { 32 compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
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D | cv1812h.dtsi | 33 &clint { 34 compatible = "sophgo,cv1812h-clint", "thead,c900-clint";
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D | sg2002.dtsi | 33 &clint { 34 compatible = "sophgo,sg2002-clint", "thead,c900-clint";
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D | cv18xx.dtsi | 357 clint: timer@74000000 { label
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/linux-6.14.4/arch/riscv/include/asm/ |
D | clint.h | 14 * This lives in the CLINT driver, but is accessed directly by timex.h to avoid
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D | timex.h | 15 #include <asm/clint.h>
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/ |
D | thead,c900-aclint-mswi.yaml | 7 title: Sophgo sg2042 CLINT Machine-level Software Interrupt Device
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/linux-6.14.4/arch/riscv/boot/dts/starfive/ |
D | jh7100.dtsi | 156 clint: clint@2000000 { label 157 compatible = "starfive,jh7100-clint", "sifive,clint0";
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D | jh7110.dtsi | 354 clint: timer@2000000 { label 355 compatible = "starfive,jh7110-clint", "sifive,clint0";
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/linux-6.14.4/arch/riscv/boot/dts/microchip/ |
D | mpfs.dtsi | 221 clint: clint@2000000 { label 222 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
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/linux-6.14.4/arch/riscv/boot/dts/thead/ |
D | th1520.dtsi | 253 clint: timer@ffdc000000 { label 254 compatible = "thead,th1520-clint", "thead,c900-clint";
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/linux-6.14.4/arch/riscv/boot/dts/spacemit/ |
D | k1.dtsi | 429 clint: timer@e4000000 { label 430 compatible = "spacemit,k1-clint", "sifive,clint0";
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/linux-6.14.4/drivers/irqchip/ |
D | irq-riscv-intc.c | 98 * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement in riscv_intc_irq_eoi()
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/linux-6.14.4/arch/riscv/boot/dts/canaan/ |
D | k210.dtsi | 111 compatible = "canaan,k210-clint", "sifive,clint0";
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