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/linux-6.14.4/Documentation/i2c/busses/
Dscx200_acb.rst15 By default the driver uses two base addresses 0x820 and 0x840.
16 If you want only one base address, specify the second as 0 so as to
28 The SC1100 WRAP boards are known to use base addresses 0x810 and 0x820.
32 scx200_acb.base=0x810,0x820
37 options scx200_acb base=0x810,0x820
/linux-6.14.4/arch/arm64/include/asm/
Dvncr_mapping.h10 #define VNCR_VTTBR_EL2 0x020
11 #define VNCR_VTCR_EL2 0x040
12 #define VNCR_VMPIDR_EL2 0x050
13 #define VNCR_CNTVOFF_EL2 0x060
14 #define VNCR_HCR_EL2 0x078
15 #define VNCR_HSTR_EL2 0x080
16 #define VNCR_VPIDR_EL2 0x088
17 #define VNCR_TPIDR_EL2 0x090
18 #define VNCR_HCRX_EL2 0x0A0
19 #define VNCR_VNCR_EL2 0x0B0
[all …]
/linux-6.14.4/drivers/clk/sophgo/
Dclk-cv1800.h14 #define REG_PLL_G2_CTRL 0x800
15 #define REG_PLL_G2_STATUS 0x804
16 #define REG_MIPIMPLL_CSR 0x808
17 #define REG_A0PLL_CSR 0x80C
18 #define REG_DISPPLL_CSR 0x810
19 #define REG_CAM0PLL_CSR 0x814
20 #define REG_CAM1PLL_CSR 0x818
21 #define REG_PLL_G2_SSC_SYN_CTRL 0x840
22 #define REG_A0PLL_SSC_SYN_CTRL 0x850
23 #define REG_A0PLL_SSC_SYN_SET 0x854
[all …]
/linux-6.14.4/drivers/net/ethernet/broadcom/
Dbcm4908_enet.h5 #define ENET_CONTROL 0x000
6 #define ENET_MIB_CTRL 0x004
7 #define ENET_MIB_CTRL_CLR_MIB 0x00000001
8 #define ENET_RX_ERR_MASK 0x008
9 #define ENET_MIB_MAX_PKT_SIZE 0x00C
10 #define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff
11 #define ENET_DIAG_OUT 0x01c
12 #define ENET_ENABLE_DROP_PKT 0x020
13 #define ENET_IRQ_ENABLE 0x024
14 #define ENET_IRQ_ENABLE_OVFL 0x00000001
[all …]
/linux-6.14.4/drivers/media/pci/cx18/
Dcx18-av-core.h32 CX18_AV_SVIDEO_LUMA1 = 0x10,
33 CX18_AV_SVIDEO_LUMA2 = 0x20,
34 CX18_AV_SVIDEO_LUMA3 = 0x30,
35 CX18_AV_SVIDEO_LUMA4 = 0x40,
36 CX18_AV_SVIDEO_LUMA5 = 0x50,
37 CX18_AV_SVIDEO_LUMA6 = 0x60,
38 CX18_AV_SVIDEO_LUMA7 = 0x70,
39 CX18_AV_SVIDEO_LUMA8 = 0x80,
40 CX18_AV_SVIDEO_CHROMA4 = 0x400,
41 CX18_AV_SVIDEO_CHROMA5 = 0x500,
[all …]
/linux-6.14.4/include/dt-bindings/pinctrl/
Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/linux-6.14.4/drivers/staging/rtl8723bs/include/
Dhal_com_phycfg.h10 #define PathA 0x0 /* Useless */
11 #define PathB 0x1
12 #define PathC 0x2
13 #define PathD 0x3
16 CCK = 0,
21 #define MAX_POWER_INDEX 0x3F
24 TXPWR_LMT_FCC = 0,
34 /* 0x870~0x877[8 bytes] */
37 /* 0x860~0x86f [16 bytes] */
40 /* 0x860~0x86f [16 bytes] */
[all …]
DHal8192CPhyReg.h41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
44 /* 3. RF register 0x00-2E */
50 /* 3. Page8(0x800) */
52 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */
54 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */
55 #define rFPGA0_XA_HSSIParameter2 0x824
56 #define rFPGA0_XB_HSSIParameter1 0x828
57 #define rFPGA0_XB_HSSIParameter2 0x82c
58 #define rTxAGC_B_Rate18_06 0x830
[all …]
/linux-6.14.4/arch/arm/boot/dts/ti/omap/
Ddra76x-mmc-iodelay.dtsi32 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
33 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
34 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
35 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
36 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
37 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
43 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
44 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
45 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
46 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
Ddra74x-mmc-iodelay.dtsi35 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
36 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
37 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
38 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
39 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
40 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
46 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
47 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
48 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
49 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
/linux-6.14.4/arch/sh/boards/
Dboard-sh7757lcr.c27 .start = 0xffec005c, /* PUDR */
28 .end = 0xffec005c,
32 static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
51 #define GBECONT 0xffc10100
56 if (((unsigned long)addr & 0x00000fff) < 0x0800) in sh7757_eth_set_mdio_gate()
64 .start = 0xfef00000,
65 .end = 0xfef001ff,
68 .start = evt2irq(0xc80),
69 .end = evt2irq(0xc80),
82 .id = 0,
[all …]
/linux-6.14.4/arch/sh/kernel/cpu/sh3/
Dsetup-sh7710.c19 UNUSED = 0,
33 INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820),
34 INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860),
35 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
36 INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
37 INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920),
38 INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960),
39 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
41 INTC_VECT(IPSEC, 0xbe0),
43 INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
[all …]
Dsetup-sh7705.c20 UNUSED = 0,
36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
40 INTC_VECT(SCIF0, 0x8e0),
41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
42 INTC_VECT(SCIF2, 0x960),
43 INTC_VECT(ADC_ADI, 0x980),
44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
[all …]
Dsetup-sh770x.c24 UNUSED = 0,
36 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
37 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
38 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
39 INTC_VECT(RTC, 0x4c0),
40 INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
41 INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
42 INTC_VECT(WDT, 0x560),
43 INTC_VECT(REF, 0x580),
44 INTC_VECT(REF, 0x5a0),
[all …]
Dsetup-sh7720.c26 [0] = {
27 .start = 0xa413fec0,
28 .end = 0xa413fec0 + 0x28 - 1,
33 .start = evt2irq(0x480),
59 DEFINE_RES_MEM(0xa4430000, 0x100),
60 DEFINE_RES_IRQ(evt2irq(0xc00)),
65 .id = 0,
80 DEFINE_RES_MEM(0xa4438000, 0x100),
81 DEFINE_RES_IRQ(evt2irq(0xc20)),
95 [0] = {
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtw88/
Drtw8822b.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
Drtw8821c.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
/linux-6.14.4/include/media/drv-intf/
Dcx25840.h45 CX25840_SVIDEO_LUMA1 = 0x10,
46 CX25840_SVIDEO_LUMA2 = 0x20,
47 CX25840_SVIDEO_LUMA3 = 0x30,
48 CX25840_SVIDEO_LUMA4 = 0x40,
49 CX25840_SVIDEO_LUMA5 = 0x50,
50 CX25840_SVIDEO_LUMA6 = 0x60,
51 CX25840_SVIDEO_LUMA7 = 0x70,
52 CX25840_SVIDEO_LUMA8 = 0x80,
53 CX25840_SVIDEO_CHROMA4 = 0x400,
54 CX25840_SVIDEO_CHROMA5 = 0x500,
[all …]
/linux-6.14.4/arch/arm/mach-imx/
Dsrc.c19 #define SRC_SCR 0x000
20 #define SRC_GPR1_V1 0x020
21 #define SRC_GPR1_V2 0x074
23 #define BP_SRC_SCR_WARM_RESET_ENABLE 0
32 #define SRC_A7RCR1 0x008
34 #define GPC_CPU_PGC_SW_PUP_REQ 0xf0
35 #define GPC_CPU_PGC_SW_PDN_REQ 0xfc
36 #define GPC_PGC_C1 0x840
37 #define BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7 0x2
78 return 0; in imx_src_reset_module()
[all …]
/linux-6.14.4/drivers/net/dsa/
Drzn1_a5psw.h18 #define A5PSW_REVISION 0x0
19 #define A5PSW_PORT_OFFSET(port) (0x400 * (port))
21 #define A5PSW_PORT_ENA 0x8
26 #define A5PSW_UCAST_DEF_MASK 0xC
28 #define A5PSW_VLAN_VERIFY 0x10
29 #define A5PSW_VLAN_VERI_SHIFT 0
32 #define A5PSW_BCAST_DEF_MASK 0x14
33 #define A5PSW_MCAST_DEF_MASK 0x18
35 #define A5PSW_INPUT_LEARN 0x1C
39 #define A5PSW_MGMT_CFG 0x20
[all …]
/linux-6.14.4/include/video/
Dsh_mobile_lcdc.h8 #define _LDDCKR 0x410
9 #define LDDCKR_ICKSEL_BUS (0 << 16)
15 #define _LDDCKSTPR 0x414
16 #define _LDINTR 0x468
22 #define LDINTR_VES (1 << 0)
23 #define LDINTR_STATUS_MASK (0xff << 0)
24 #define _LDSR 0x46c
28 #define _LDCNT1R 0x470
29 #define LDCNT1R_DE (1 << 0)
30 #define _LDCNT2R 0x474
[all …]
/linux-6.14.4/drivers/gpu/drm/sun4i/
Dsun4i_backend.h20 #define SUN4I_BACKEND_MODCTL_REG 0x800
24 #define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20)
34 #define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0)
36 #define SUN4I_BACKEND_BACKCOLOR_REG 0x804
39 #define SUN4I_BACKEND_DISSIZE_REG 0x808
40 #define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \
41 (((w) - 1) & 0xffff))
43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l)))
44 #define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \
45 (((w) - 1) & 0x1fff))
[all …]
/linux-6.14.4/arch/alpha/kernel/
Dsys_ruffian.c39 *(vulp)PYXIS_INT_HILO = 0x000000c0UL; mb(); in ruffian_init_irq()
40 *(vulp)PYXIS_INT_CNFG = 0x00002064UL; mb(); /* all clear */ in ruffian_init_irq()
42 outb(0x11,0xA0); in ruffian_init_irq()
43 outb(0x08,0xA1); in ruffian_init_irq()
44 outb(0x02,0xA1); in ruffian_init_irq()
45 outb(0x01,0xA1); in ruffian_init_irq()
46 outb(0xFF,0xA1); in ruffian_init_irq()
48 outb(0x11,0x20); in ruffian_init_irq()
49 outb(0x00,0x21); in ruffian_init_irq()
50 outb(0x04,0x21); in ruffian_init_irq()
[all …]
/linux-6.14.4/arch/m68k/include/asm/
Dm5272sim.h25 #define MCFSIM_SCR (MCF_MBAR + 0x04) /* SIM Config reg */
26 #define MCFSIM_SPR (MCF_MBAR + 0x06) /* System Protection */
27 #define MCFSIM_PMR (MCF_MBAR + 0x08) /* Power Management */
28 #define MCFSIM_APMR (MCF_MBAR + 0x0e) /* Active Low Power */
29 #define MCFSIM_DIR (MCF_MBAR + 0x10) /* Device Identity */
31 #define MCFSIM_ICR1 (MCF_MBAR + 0x20) /* Intr Ctrl reg 1 */
32 #define MCFSIM_ICR2 (MCF_MBAR + 0x24) /* Intr Ctrl reg 2 */
33 #define MCFSIM_ICR3 (MCF_MBAR + 0x28) /* Intr Ctrl reg 3 */
34 #define MCFSIM_ICR4 (MCF_MBAR + 0x2c) /* Intr Ctrl reg 4 */
36 #define MCFSIM_ISR (MCF_MBAR + 0x30) /* Intr Source */
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/media/
Dqcom,sm8250-camss.yaml112 port@0:
307 reg = <0 0xac6a000 0 0x2000>,
308 <0 0xac6c000 0 0x2000>,
309 <0 0xac6e000 0 0x1000>,
310 <0 0xac70000 0 0x1000>,
311 <0 0xac72000 0 0x1000>,
312 <0 0xac74000 0 0x1000>,
313 <0 0xacb4000 0 0xd000>,
314 <0 0xacc3000 0 0xd000>,
315 <0 0xacd9000 0 0x2200>,
[all …]

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