Lines Matching +full:0 +full:x840
39 *(vulp)PYXIS_INT_HILO = 0x000000c0UL; mb(); in ruffian_init_irq()
40 *(vulp)PYXIS_INT_CNFG = 0x00002064UL; mb(); /* all clear */ in ruffian_init_irq()
42 outb(0x11,0xA0); in ruffian_init_irq()
43 outb(0x08,0xA1); in ruffian_init_irq()
44 outb(0x02,0xA1); in ruffian_init_irq()
45 outb(0x01,0xA1); in ruffian_init_irq()
46 outb(0xFF,0xA1); in ruffian_init_irq()
48 outb(0x11,0x20); in ruffian_init_irq()
49 outb(0x00,0x21); in ruffian_init_irq()
50 outb(0x04,0x21); in ruffian_init_irq()
51 outb(0x01,0x21); in ruffian_init_irq()
52 outb(0xFF,0x21); in ruffian_init_irq()
55 outb(0x20,0xA0); in ruffian_init_irq()
56 outb(0x20,0x20); in ruffian_init_irq()
60 /* Not interested in the bogus interrupts (0,3,6), in ruffian_init_irq()
62 init_pyxis_irqs(0x16f0000); in ruffian_init_irq()
73 interrupt. Instead, it uses the PIT connected to IRQ 0. */ in ruffian_init_rtc()
76 outb(0x34, 0x43); /* binary, mode 2, LSB/MSB, ch 0 */ in ruffian_init_rtc()
77 outb(RUFFIAN_LATCH & 0xff, 0x40); /* LSB */ in ruffian_init_rtc()
78 outb(RUFFIAN_LATCH >> 8, 0x40); /* MSB */ in ruffian_init_rtc()
80 outb(0xb6, 0x43); /* pit counter 2: speaker */ in ruffian_init_rtc()
81 outb(0x31, 0x42); in ruffian_init_rtc()
82 outb(0x13, 0x42); in ruffian_init_rtc()
84 if (request_irq(0, rtc_timer_interrupt, 0, "timer", NULL)) in ruffian_init_rtc()
85 pr_err("Failed to request irq 0 (timer)\n"); in ruffian_init_rtc()
92 #if 0 in ruffian_kill_arch()
95 *(vuip) PYXIS_RESET = 0x0000dead; in ruffian_kill_arch()
108 * Slot 0 17 43 42 41 40
112 * Slot 0 8 (18) 19 18 17 16
132 {19, 19, 18, 17, 16}, /* IdSel 8, slot 0 */ in ruffian_map_irq()
148 if (dev->bus->number == 0) { in ruffian_swizzle()
184 unsigned long bank_addr, bank, ret = 0; in ruffian_get_bank_size()
186 /* Valid offsets are: 0x800, 0x840 and 0x880 in ruffian_get_bank_size()
192 if (bank & 0x01) { in ruffian_get_bank_size()
194 0x40000000UL, /* 0x00, 1G */ in ruffian_get_bank_size()
195 0x20000000UL, /* 0x02, 512M */ in ruffian_get_bank_size()
196 0x10000000UL, /* 0x04, 256M */ in ruffian_get_bank_size()
197 0x08000000UL, /* 0x06, 128M */ in ruffian_get_bank_size()
198 0x04000000UL, /* 0x08, 64M */ in ruffian_get_bank_size()
199 0x02000000UL, /* 0x0a, 32M */ in ruffian_get_bank_size()
200 0x01000000UL, /* 0x0c, 16M */ in ruffian_get_bank_size()
201 0x00800000UL, /* 0x0e, 8M */ in ruffian_get_bank_size()
202 0x80000000UL, /* 0x10, 2G */ in ruffian_get_bank_size()
205 bank = (bank & 0x1e) >> 1; in ruffian_get_bank_size()