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/linux-6.14.4/drivers/gpu/drm/nouveau/nvkm/subdev/bar/
Dg84.c34 nvkm_wr32(device, 0x070000, 0x00000001); in g84_bar_flush()
36 if (!(nvkm_rd32(device, 0x070000) & 0x00000002)) in g84_bar_flush()
62 return nv50_bar_new_(&g84_bar_func, device, type, inst, 0x200, pbar); in g84_bar_new()
/linux-6.14.4/Documentation/devicetree/bindings/serio/
Darm,pl050.yaml61 reg = <0x070000 0x1000>;
/linux-6.14.4/arch/arm64/boot/dts/arm/
Drtsm_ve-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
49 #clock-cells = <0>;
55 arm,vexpress-sysreg,func = <5 0>;
60 arm,vexpress-sysreg,func = <7 0>;
65 arm,vexpress-sysreg,func = <8 0>;
70 arm,vexpress-sysreg,func = <9 0>;
75 arm,vexpress-sysreg,func = <11 0>;
83 ranges = <0 0x8000000 0 0x8000000 0x18000000>;
[all …]
Djuno-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
34 #clock-cells = <0>;
55 gpios = <&iofpga_gpio0 0 0x4>;
62 gpios = <&iofpga_gpio0 1 0x4>;
69 gpios = <&iofpga_gpio0 2 0x4>;
76 gpios = <&iofpga_gpio0 3 0x4>;
83 gpios = <&iofpga_gpio0 4 0x4>;
90 gpios = <&iofpga_gpio0 5 0x4>;
[all …]
/linux-6.14.4/sound/pci/mixart/
Dmixart_core.h15 MSG_CONNECTOR_GET_AUDIO_INFO = 0x050008,
16 MSG_CONNECTOR_GET_OUT_AUDIO_LEVEL = 0x050009,
17 MSG_CONNECTOR_SET_OUT_AUDIO_LEVEL = 0x05000A,
19 MSG_CONSOLE_MANAGER = 0x070000,
20 MSG_CONSOLE_GET_CLOCK_UID = 0x070003,
22 MSG_PHYSICALIO_SET_LEVEL = 0x0F0008,
24 MSG_STREAM_ADD_INPUT_GROUP = 0x130000,
25 MSG_STREAM_ADD_OUTPUT_GROUP = 0x130001,
26 MSG_STREAM_DELETE_GROUP = 0x130004,
27 MSG_STREAM_START_STREAM_GRP_PACKET = 0x130006,
[all …]
/linux-6.14.4/include/linux/
Dsm501-regs.h11 #define SM501_SYS_CONFIG (0x000000)
14 #define SM501_SYSTEM_CONTROL (0x000000)
16 #define SM501_SYSCTRL_PANEL_TRISTATE (1<<0)
21 #define SM501_SYSCTRL_PCI_SLAVE_BURST_1 (0<<4)
35 #define SM501_MISC_CONTROL (0x000004)
37 #define SM501_MISC_BUS_SH (0x0)
38 #define SM501_MISC_BUS_PCI (0x1)
39 #define SM501_MISC_BUS_XSCALE (0x2)
40 #define SM501_MISC_BUS_NEC (0x6)
41 #define SM501_MISC_BUS_MASK (0x7)
[all …]
/linux-6.14.4/drivers/scsi/pm8001/
Dpm8001_hwi.h48 #define OPC_INB_ECHO 1 /* 0x000 */
49 #define OPC_INB_PHYSTART 4 /* 0x004 */
50 #define OPC_INB_PHYSTOP 5 /* 0x005 */
51 #define OPC_INB_SSPINIIOSTART 6 /* 0x006 */
52 #define OPC_INB_SSPINITMSTART 7 /* 0x007 */
53 #define OPC_INB_SSPINIEXTIOSTART 8 /* 0x008 */
54 #define OPC_INB_DEV_HANDLE_ACCEPT 9 /* 0x009 */
55 #define OPC_INB_SSPTGTIOSTART 10 /* 0x00A */
56 #define OPC_INB_SSPTGTRSPSTART 11 /* 0x00B */
57 #define OPC_INB_SSPINIEDCIOSTART 12 /* 0x00C */
[all …]
Dpm80xx_hwi.h48 #define OPC_INB_ECHO 1 /* 0x000 */
49 #define OPC_INB_PHYSTART 4 /* 0x004 */
50 #define OPC_INB_PHYSTOP 5 /* 0x005 */
51 #define OPC_INB_SSPINIIOSTART 6 /* 0x006 */
52 #define OPC_INB_SSPINITMSTART 7 /* 0x007 */
53 /* 0x8 RESV IN SPCv */
54 #define OPC_INB_RSVD 8 /* 0x008 */
55 #define OPC_INB_DEV_HANDLE_ACCEPT 9 /* 0x009 */
56 #define OPC_INB_SSPTGTIOSTART 10 /* 0x00A */
57 #define OPC_INB_SSPTGTRSPSTART 11 /* 0x00B */
[all …]
/linux-6.14.4/arch/arm/boot/dts/arm/
Dvexpress-v2m-rs1.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
47 #clock-cells = <0>;
57 gpios = <&v2m_led_gpios 0 0>;
63 gpios = <&v2m_led_gpios 1 0>;
69 gpios = <&v2m_led_gpios 2 0>;
75 gpios = <&v2m_led_gpios 3 0>;
81 gpios = <&v2m_led_gpios 4 0>;
87 gpios = <&v2m_led_gpios 5 0>;
93 gpios = <&v2m_led_gpios 6 0>;
[all …]
/linux-6.14.4/arch/mips/include/asm/
Dcpu.h16 register 15, select 0) is defined in this (backwards compatible) way:
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
28 #define PRID_OPT_MASK 0xff000000
34 #define PRID_COMP_MASK 0xff0000
36 #define PRID_COMP_LEGACY 0x000000
37 #define PRID_COMP_MIPS 0x010000
38 #define PRID_COMP_BROADCOM 0x020000
39 #define PRID_COMP_ALCHEMY 0x030000
40 #define PRID_COMP_SIBYTE 0x040000
41 #define PRID_COMP_SANDCRAFT 0x050000
[all …]
/linux-6.14.4/drivers/clk/imx/
Dclk-imx8-acm.c135 … IMX_ADMA_ACM_AUD_CLK0_SEL, imx8qm_aud_clk_sels, ARRAY_SIZE(imx8qm_aud_clk_sels), 0x000000, 0, 5 },
136 … IMX_ADMA_ACM_AUD_CLK1_SEL, imx8qm_aud_clk_sels, ARRAY_SIZE(imx8qm_aud_clk_sels), 0x010000, 0, 5 },
137 …MX_ADMA_ACM_MCLKOUT0_SEL, imx8qm_mclk_out_sels, ARRAY_SIZE(imx8qm_mclk_out_sels), 0x020000, 0, 3 },
138 …MX_ADMA_ACM_MCLKOUT1_SEL, imx8qm_mclk_out_sels, ARRAY_SIZE(imx8qm_mclk_out_sels), 0x030000, 0, 3 },
139 …SRC0_MUX_CLK_SEL, imx8qm_asrc_mux_clk_sels, ARRAY_SIZE(imx8qm_asrc_mux_clk_sels), 0x040000, 0, 2 },
140 …el", IMX_ADMA_ACM_ESAI0_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x060000, 0, 2 },
141 …el", IMX_ADMA_ACM_ESAI1_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x070000, 0, 2 },
142 …sel", IMX_ADMA_ACM_SAI0_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x0E0000, 0, 2 },
143 …sel", IMX_ADMA_ACM_SAI1_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x0F0000, 0, 2 },
144 …sel", IMX_ADMA_ACM_SAI2_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x100000, 0, 2 },
[all …]
/linux-6.14.4/sound/soc/codecs/
Dcs43130.h17 #define CS43130_FIRSTREG 0x010000
18 #define CS43130_LASTREG 0x190000
19 #define CS43130_CHIP_ID 0x00043130
20 #define CS4399_CHIP_ID 0x00043990
21 #define CS43131_CHIP_ID 0x00043131
22 #define CS43198_CHIP_ID 0x00043198
23 #define CS43130_DEVID_AB 0x010000 /* Device ID A & B [RO] */
24 #define CS43130_DEVID_CD 0x010001 /* Device ID C & D [RO] */
25 #define CS43130_DEVID_E 0x010002 /* Device ID E [RO] */
26 #define CS43130_FAB_ID 0x010003 /* Fab ID [RO] */
[all …]
/linux-6.14.4/drivers/net/wireless/mediatek/mt76/mt7925/
Dpci.c14 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7925),
16 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x0717),
57 dev->backup_l1 = 0; in mt7925_reg_remap_restore()
62 dev->backup_l2 = 0; in mt7925_reg_remap_restore()
103 { 0x830c0000, 0x000000, 0x0001000 }, /* WF_MCU_BUS_CR_REMAP */ in __mt7925_reg_addr()
104 { 0x54000000, 0x002000, 0x0001000 }, /* WFDMA PCIE0 MCU DMA0 */ in __mt7925_reg_addr()
105 { 0x55000000, 0x003000, 0x0001000 }, /* WFDMA PCIE0 MCU DMA1 */ in __mt7925_reg_addr()
106 { 0x56000000, 0x004000, 0x0001000 }, /* WFDMA reserved */ in __mt7925_reg_addr()
107 { 0x57000000, 0x005000, 0x0001000 }, /* WFDMA MCU wrap CR */ in __mt7925_reg_addr()
108 { 0x58000000, 0x006000, 0x0001000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ in __mt7925_reg_addr()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-ls1028a.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
[all …]
/linux-6.14.4/drivers/gpu/drm/nouveau/dispnv50/
Ddisp.c87 if (ret < 0) in nv50_chan_create()
90 while (oclass[0]) { in nv50_chan_create()
91 for (i = 0; i < n; i++) { in nv50_chan_create()
92 if (sclass[i].oclass == oclass[0]) { in nv50_chan_create()
93 ret = nvif_object_ctor(disp, "kmsChan", 0, in nv50_chan_create()
94 oclass[0], data, size, in nv50_chan_create()
96 if (ret == 0) { in nv50_chan_create()
97 ret = nvif_object_map(&chan->user, NULL, 0); in nv50_chan_create()
145 nvif_wr32(&device->object, 0x070000, 0x00000001); in nv50_dmac_kick()
147 if (!(nvif_rd32(&device->object, 0x070000) & 0x00000002)) in nv50_dmac_kick()
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
Dreg.h7 #define REG_SYS_ISO_CTRL 0x0000
8 #define REG_SYS_FUNC_EN 0x0002
9 #define REG_APS_FSMCO 0x0004
10 #define REG_SYS_CLKR 0x0008
11 #define REG_9346CR 0x000A
12 #define REG_EE_VPD 0x000C
13 #define REG_AFE_MISC 0x0010
14 #define REG_SPS0_CTRL 0x0011
15 #define REG_SPS_OCP_CFG 0x0018
16 #define REG_RSV_CTRL 0x001C
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
Dreg.h7 #define REG_SYS_ISO_CTRL 0x0000
8 #define REG_SYS_FUNC_EN 0x0002
9 #define REG_APS_FSMCO 0x0004
10 #define REG_SYS_CLKR 0x0008
11 #define REG_9346CR 0x000A
12 #define REG_EE_VPD 0x000C
13 #define REG_AFE_MISC 0x0010
14 #define REG_SPS0_CTRL 0x0011
15 #define REG_SPS_OCP_CFG 0x0018
16 #define REG_RSV_CTRL 0x001C
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_SYS_SWR_CTRL1 0x0010
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/linux-6.14.4/drivers/platform/x86/
Dsony-laptop.c64 } while (0)
79 module_param(debug, int, 0);
83 static int no_spic; /* = 0 */
88 static int compat; /* = 0 */
93 static unsigned long mask = 0xffffffff;
98 static int camera; /* = 0 */
106 module_param(minor, int, 0);
115 "set this to 0 to disable keyboard backlight, "
122 "meaningful values vary from 0 to 3 and their meaning depends "
181 static int sony_rfkill_address[N_SONY_RFKILL] = {0x300, 0x500, 0x700, 0x900};
[all …]