Home
last modified time | relevance | path

Searched defs:VALUE (Results 1 – 25 of 43) sorted by relevance

12

/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/STM32L4xx_HAL_Driver/Inc/
H A Dstm32l4xx_hal_flash.h869 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ argument
887 #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \ argument
922 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBY… argument
927 #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_W… argument
930 #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_W… argument
949 #define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) argument
951 #define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_N… argument
953 #define IS_OB_USER_SHUTDOWN(VALUE) (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN… argument
955 #define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) argument
957 #define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG… argument
[all …]
/btstack/port/stm32-l451-miromico-sx1280/Drivers/STM32L4xx_HAL_Driver/Inc/
H A Dstm32l4xx_hal_flash.h869 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ argument
887 #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \ argument
922 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBY… argument
927 #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_W… argument
930 #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_W… argument
949 #define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) argument
951 #define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_N… argument
953 #define IS_OB_USER_SHUTDOWN(VALUE) (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN… argument
955 #define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) argument
957 #define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG… argument
[all …]
H A Dstm32l4xx_hal_gfxmmu.h299 #define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \ argument
302 #define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U) argument
304 #define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U) argument
306 #define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U) argument
308 #define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U)) argument
310 #define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \ argument
313 #define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U) argument
315 #define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208)) argument
H A Dstm32l4xx_hal_dfsdm.h795 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 838860… argument
796 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1FU) argument
797 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFFU) argument
851 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 838860… argument
852 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0xFU) argument
H A Dstm32l4xx_hal_dfsdm_ex.h72 #define IS_DFSDM_CHANNEL_SKIPPING_VALUE(VALUE) ((VALUE) < 64U) argument
H A Dstm32l4xx_hal_sai_ex.h89 #define IS_SAI_PDM_MIC_DELAY(VALUE) ((VALUE) <= 7U) argument
H A Dstm32l4xx_hal_sai.h873 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ argument
876 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) argument
918 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ argument
H A Dstm32l4xx_hal_dac_ex.h164 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ argument
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Include/
H A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) argument
307 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) argument
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) argument
309 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
319 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) argument
[all …]
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Include/
H A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) argument
307 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) argument
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) argument
309 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
319 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) argument
[all …]
/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Include/
H A Dcmsis_iccarm.h307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
310 #define __set_FPSCR(VALUE) ((void)VALUE) argument
335 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) argument
336 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) argument
337 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) argument
338 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) argument
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
344 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
348 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) argument
[all …]
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Core/Include/
H A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) argument
307 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) argument
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) argument
309 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
319 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) argument
[all …]
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Include/
H A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) argument
307 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) argument
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) argument
309 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
319 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) argument
[all …]
/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/arm/CMSIS_5/CMSIS/Core/Include/
H A Dcmsis_iccarm.h328 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
331 #define __set_FPSCR(VALUE) ((void)VALUE) argument
356 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) argument
357 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) argument
365 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) argument
366 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
371 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
373 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
375 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) argument
376 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
[all …]
/btstack/port/stm32-f4discovery-cc256x/Drivers/STM32F4xx_HAL_Driver/Inc/
H A Dstm32f4xx_hal_flash_ex.h813 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ argument
821 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ argument
824 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_… argument
844 #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \ argument
852 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \ argument
860 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP)) argument
H A Dstm32f4xx_hal_rcc_ex.h6871 #define IS_RCC_PLLN_VALUE(VALUE) ((192U <= (VALUE)) && ((VALUE) <= 432U)) argument
6872 #define IS_RCC_PLLI2SN_VALUE(VALUE) ((192U <= (VALUE)) && ((VALUE) <= 432U)) argument
6877 #define IS_RCC_PLLN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U)) argument
6878 #define IS_RCC_PLLI2SN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U)) argument
6913 #define IS_RCC_PLLI2SR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U)) argument
6917 #define IS_RCC_PLLI2SQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U)) argument
6919 #define IS_RCC_PLLSAIN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U)) argument
6921 #define IS_RCC_PLLSAIQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U)) argument
6923 #define IS_RCC_PLLSAIR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U)) argument
6925 #define IS_RCC_PLLSAI_DIVQ_VALUE(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 32U)) argument
[all …]
H A Dstm32f4xx_hal_rcc.h1414 #define IS_RCC_PLLM_VALUE(VALUE) ((VALUE) <= 63U) argument
1416 #define IS_RCC_PLLP_VALUE(VALUE) (((VALUE) == 2U) || ((VALUE) == 4U) || ((VALUE) == 6U) || ((VALUE)… argument
1418 #define IS_RCC_PLLQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U)) argument
1440 #define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1FU) argument
/btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/
H A Dstm32f4xx_hal_flash_ex.h813 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ argument
821 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ argument
824 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_… argument
844 #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \ argument
852 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \ argument
860 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP)) argument
H A Dstm32f4xx_hal_rcc_ex.h6871 #define IS_RCC_PLLN_VALUE(VALUE) ((192U <= (VALUE)) && ((VALUE) <= 432U)) argument
6872 #define IS_RCC_PLLI2SN_VALUE(VALUE) ((192U <= (VALUE)) && ((VALUE) <= 432U)) argument
6877 #define IS_RCC_PLLN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U)) argument
6878 #define IS_RCC_PLLI2SN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U)) argument
6913 #define IS_RCC_PLLI2SR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U)) argument
6917 #define IS_RCC_PLLI2SQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U)) argument
6919 #define IS_RCC_PLLSAIN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U)) argument
6921 #define IS_RCC_PLLSAIQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U)) argument
6923 #define IS_RCC_PLLSAIR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U)) argument
6925 #define IS_RCC_PLLSAI_DIVQ_VALUE(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 32U)) argument
[all …]
H A Dstm32f4xx_hal_dfsdm.h978 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 838860… argument
979 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1FU) argument
980 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFFU) argument
1022 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 838860… argument
1023 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0x0FU) argument
H A Dstm32f4xx_hal_dac_ex.h126 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ argument
H A Dstm32f4xx_hal_rcc.h1414 #define IS_RCC_PLLM_VALUE(VALUE) ((VALUE) <= 63U) argument
1416 #define IS_RCC_PLLP_VALUE(VALUE) (((VALUE) == 2U) || ((VALUE) == 4U) || ((VALUE) == 6U) || ((VALUE)… argument
1418 #define IS_RCC_PLLQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U)) argument
1440 #define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1FU) argument
H A Dstm32f4xx_hal_rtc_ex.h975 #define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20U) argument
983 #define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FFU) argument
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Core_A/Include/
H A Dcmsis_iccarm.h240 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", VALUE)) argument
245 #define __set_CPSR(VALUE) (__arm_wsr("CPSR", (VALUE))) argument
246 #define __set_mode(VALUE) (__arm_wsr("CPSR_c", (VALUE))) argument
250 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", VALUE)) argument
/btstack/test/crypto/
H A Daes_ccm_test.c11 #define DEFINE_KEY(NAME, VALUE) key_t NAME; parse_hex(NAME, VALUE); LOG_KEY(NAME); argument

12