| /btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ |
| H A D | stm32l073xx.h | 160 __IO uint32_t CSR; /*!< COMP comparator control and status register, Address offset: 0x18 */ member
165 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
416 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
444 …__IO uint32_t CSR; /*!< RCC Control/status register, Ad… member
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
| H A D | stm32f410rx.h | 174 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
368 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
397 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f410tx.h | 171 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
365 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
394 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f410cx.h | 174 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
368 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
397 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f411xe.h | 179 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
330 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
365 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f401xe.h | 178 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
329 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
364 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f401xc.h | 178 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
329 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
364 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f415xx.h | 201 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
493 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
528 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
740 …__IO uint32_t CSR[54]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1CC */ member
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| H A D | stm32f417xx.h | 204 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
589 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
624 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
836 …__IO uint32_t CSR[54]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1CC */ member
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| H A D | stm32f446xx.h | 208 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
544 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
579 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
737 __IO uint32_t CSR; /*!< Channel Status register, Address offset: 0x14 */ member
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| H A D | stm32f437xx.h | 211 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
638 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
673 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
908 …__IO uint32_t CSR[54]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1CC */ member
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| H A D | stm32f412cx.h | 199 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
471 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
503 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f439xx.h | 213 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
686 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
721 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
956 …__IO uint32_t CSR[54]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1CC */ member
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| H A D | stm32f412zx.h | 200 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
491 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
526 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f412vx.h | 200 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
491 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
526 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f412rx.h | 200 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
491 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
526 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f405xx.h | 202 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
494 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
529 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f407xx.h | 205 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
590 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
625 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f413xx.h | 216 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
531 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
566 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| H A D | stm32f423xx.h | 217 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
532 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
567 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
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| /btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| H A D | stm32l451xx.h | 287 __IO uint32_t CSR; /*!< COMP control and status register, Address offset: 0x00 */ member
292 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
564 …__IO uint32_t CSR; /*!< OPAMP control/status register, Address offset:… member
571 …__IO uint32_t CSR; /*!< OPAMP control/status register, used for bits common to several OPA… member
672 …__IO uint32_t CSR; /*!< RCC clock control & status register, … member
906 …__IO uint32_t CSR; /*!< VREFBUF control and status register, Address offset: 0x00 … member
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| /btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ |
| H A D | stm32wb55xx.h | 219 …__IO uint32_t CSR; /*!< COMP control and status register, Address offset: 0x… member
224 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
284 …__IO uint32_t CSR; /*!< DMA Channel Status Register Address offset: 0x0… member
486 …__IO uint32_t CSR; /*!< RCC Control and Status Register, … member
603 …__IO uint32_t CSR; /*!< VREFBUF control and status register, Address offset: 0x00 … member
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| H A D | stm32wb50xx.h | 252 …__IO uint32_t CSR; /*!< DMA Channel Status Register Address offset: 0x0… member
433 …__IO uint32_t CSR; /*!< RCC Control and Status Register, … member
550 …__IO uint32_t CSR; /*!< VREFBUF control and status register, Address offset: 0x00 … member
|
| /btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| H A D | stm32l476xx.h | 222 …__IO uint32_t CSR; /*!< ADC common status register, Address offset: AD… member
300 __IO uint32_t CSR; /*!< COMP control and status register, Address offset: 0x00 */ member
305 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
617 …__IO uint32_t CSR; /*!< OPAMP control/status register, Address offset:… member
624 …__IO uint32_t CSR; /*!< OPAMP control/status register, used for bits common to several OPA… member
725 …__IO uint32_t CSR; /*!< RCC clock control & status register, … member
976 …__IO uint32_t CSR; /*!< VREFBUF control and status register, Address offset: 0x00 … member
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| /btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
| H A D | stm32f407xx.h | 221 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
606 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
641 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
|