| #
e9cac669 |
| 15-Jan-2025 |
Haoyuan Feng <[email protected]> |
fix(PTWRepeater): use PriorityMux for not one-hot vector (#4174)
ptwResp_OldMatchVec is not a one-hot vector, so we should use
PriorityMux rather than OHToUInt.
|
| #
b240e1c0 |
| 07-Nov-2024 |
Anzooooo <[email protected]> |
feat(Zicclsm): refactoring misalign and support vector misalign
|
| #
f3640a53 |
| 19-Sep-2024 |
Haoyuan Feng <[email protected]> |
chore(MMU): Remove timeout assertion (#3603)
With CHI enabled and CMN connected, a transaction may last over
timeoutThreshold. So this commit removes it (also since L2 Cache will
detect timeout)
|
| #
2b221cab |
| 03-Sep-2024 |
Xiaokun-Pei <[email protected]> |
fix(Repeater): fix the wrong PtwResp_hit in PTWFilter when S2xlate is enabled (#3468)
|
| #
97929664 |
| 23-Aug-2024 |
Xiaokun-Pei <[email protected]> |
MMU, RVH: add the check of gpaddr high bits and fix some bugs (#3348)
|
| #
7be7e781 |
| 26-Jul-2024 |
peixiaokun <[email protected]> |
MMU: replace RRArbiter with RRArbiterInit
|
| #
910eede8 |
| 02-Jul-2024 |
Xuan Hu <[email protected]> |
PTWRepeater: flush when `atp.changed` asserts
|
| #
5adc4829 |
| 16-Jun-2024 |
Yanqin Li <[email protected]> |
memblock: add rest clockgate of reg (#3017)
Co-authored-by: cai luoshan <[email protected]>
Co-authored-by: Cai Luoshan <[email protected]>
Co-authored-by: good-circle <
memblock: add rest clockgate of reg (#3017)
Co-authored-by: cai luoshan <[email protected]>
Co-authored-by: Cai Luoshan <[email protected]>
Co-authored-by: good-circle <[email protected]>
Co-authored-by: Ma-YX <[email protected]>
Co-authored-by: Ma-YX <[email protected]>
Co-authored-by: CharlieLiu <[email protected]>
show more ...
|
| #
bad60841 |
| 10-May-2024 |
Xiaokun-Pei <[email protected]> |
IFU & GPAMem, RVH: fix the bug about getting gpa (#2960)
1. Delete some useless codes about gpaddr.
2. fix the bugs about wrong gpa was writen in mtval2 or htval when guest
page fault occured
|
| #
aee6a6d1 |
| 26-Apr-2024 |
Yanqin Li <[email protected]> |
l2bop: train by virtual address and buffer tlb req (#2382)
|
| #
e25e4d90 |
| 11-Apr-2024 |
Xuan Hu <[email protected]> |
Merge remote-tracking branch 'upstream/master' into tmp-master
TODO: add gpaddr data path from frontend to backend
|
| #
b436d3b6 |
| 25-Mar-2024 |
peixiaokun <[email protected]> |
RVH: fix the errors after git rebase
|
| #
a4f9c77f |
| 29-Feb-2024 |
peixiaokun <[email protected]> |
RVH: rewrite the logic of getting gpaddr when guest page fault
|
| #
b188e334 |
| 02-Jan-2024 |
peixiaokun <[email protected]> |
RVH: modify the logic of satp and vsatp
|
| #
4c4af37c |
| 20-Dec-2023 |
peixiaokun <[email protected]> |
L1TLB & L2TLB, RVH: update dev-h and fix some bugs in MMU
|
| #
ad0d9d89 |
| 11-Oct-2023 |
peixiaokun <[email protected]> |
PTW: fix the bugs of llptw about the gpaddr
|
| #
496c751c |
| 27-Sep-2023 |
peixiaokun <[email protected]> |
TLB, RVH: a bug about s2xlate signal sent from tlb to ptw, a bug about writing pteidx and valididx; Repeater: a bug about checking ptw resp hit
|
| #
6f487a5d |
| 22-Sep-2023 |
peixiaokun <[email protected]> |
RVH: fix a bug that repeater can't resp to itlb
|
| #
50c7aa78 |
| 11-Sep-2023 |
peixiaokun <[email protected]> |
RVH: fix some bugs in compilation
|
| #
cca17e78 |
| 11-Sep-2023 |
peixiaokun <[email protected]> |
RVH: fix some bugs about compilation
|
| #
d61cd5ee |
| 06-Sep-2023 |
peixiaokun <[email protected]> |
RVH: fix some syntax problems
|
| #
d0de7e4a |
| 26-Aug-2023 |
peixiaokun <[email protected]> |
RVH: finish the desigh of H extention
|
| #
ec86549e |
| 02-Jan-2024 |
sfencevma <[email protected]> |
MemBlock: enable 3ld3st (#2524)
* enable 3ld3st
* assign enqLsq
* fix IssQueSize
* remove performance regression
* MMU: Fix ptwrepeater when 3ld + 3st
* fix minimal config params
*
MemBlock: enable 3ld3st (#2524)
* enable 3ld3st
* assign enqLsq
* fix IssQueSize
* remove performance regression
* MMU: Fix ptwrepeater when 3ld + 3st
* fix minimal config params
* fix minimal config LoadQueueReplaySize
* add 3ld3st switch
* fix bank conflict valid logic
* fix strict memory ambiguous logic
* fix wakeup logic
* disable 3ld3st by default
* modify minimal config params
---------
Co-authored-by: Lyn <[email protected]>
Co-authored-by: good-circle <[email protected]>
show more ...
|
| #
8ef35e01 |
| 21-Dec-2023 |
Xuan Hu <[email protected]> |
MMU: add ptw filter for hybrid unit
* The hybrid unit using will share 16 load ptw filter with ldu and load prefetch
Co-authored-by: sfencevma <[email protected]>
Co-authored-by: Haoyuan Feng <fe
MMU: add ptw filter for hybrid unit
* The hybrid unit using will share 16 load ptw filter with ldu and load prefetch
Co-authored-by: sfencevma <[email protected]>
Co-authored-by: Haoyuan Feng <[email protected]>
show more ...
|
| #
ae970023 |
| 21-Dec-2023 |
Xuan Hu <[email protected]> |
MMU: expand the limit of width of PTWFilterEntry to 4
Co-authored-by: sfencevma <[email protected]>
|