fix merge error

backend: comments vector units temporarily

Decode: optimize coding style (#2063)

func(UopDivType): support VEC_VWW of UopDivType

fix(UopDivType): fix some bugs about UopDivType.VEC_VMV

1. fix a bug about Instruction splitting of UopDivType.VEC_VMV
2. fix a bug decode of viota_m/vid_v

fix(vcpop_m): fix bug that vs1 should be 0 when uopIdx === 0.U in vcpop_m

func(UopDivType): support VEC_0MX_VFIRST

pom(yunsuan): add IALU V3 (#2004)

1. func(VPERM): fix tail process, optimize vcompress, change vslide module name
2. func(VPERM): change to 2-stage
3. test(VPERM): add golden model and test: vslid

pom(yunsuan): add IALU V3 (#2004)

1. func(VPERM): fix tail process, optimize vcompress, change vslide module name
2. func(VPERM): change to 2-stage
3. test(VPERM): add golden model and test: vslidedown
4. test(VPERM): set vxsat=0 for vperm
5. test(VFADD): support vector-scalar operations func(VFADD): support vector-scalar operations
6. test: include
7. func(VFMA): add input:op_code,frs1,is_frs1; support vfmul.vv
8. func(VFMA):add vfmul.vf vfnmacc.vv vfnmacc.vf and their test supports
9. func(IALU):add IALU V3

* fix(decode): fix decode bug of selImm

1. fix decode bug of selImm
2. change VipuType to VpermType

* func(yunsuan): add VIAlu code v3

1. add VIAlu code v3
2. Update the IO of VFPU

* pom(yunsuan): add IALU V3

1. func(VPERM): fix tail process, optimize vcompress, change vslide module name
2. func(VPERM): change to 2-stage
3. test(VPERM): add golden model and test: vslidedown
4. test(VPERM): set vxsat=0 for vperm
5. test(VFADD): support vector-scalar operations func(VFADD): support vector-scalar operations
6. test: include <algorithm>
7. func(VFMA): add input:op_code,frs1,is_frs1; support vfmul.vv
8. func(VFMA):add vfmul.vf vfnmacc.vv vfnmacc.vf and their test supports
9. func(IALU):add IALU V3

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func(vslide1up): support vslide1up instruction (#1990)

* func(decode+VIPU): support vslide1up instruction

* bump(yunsuan): func(VFADD) & VIPU type & test(VPERM)

refactor(VIPU): optimize decoding logic of VIPU

1. Some logic moves from VIPU.scala to VPUSubModule.scala
2. add VIAluFix

refactor(UopDivType): rename UopDivType & change VECTOR_TMP_REG_MV to FP_TMP_REG_MV

1. rename UopDivType
2. change VECTOR_TMP_REG_MV to FP_TMP_REG_MV
3. add UopDivType.VEC_MMM for decode of VMAND_MM

refactor(UopDivType): rename UopDivType & change VECTOR_TMP_REG_MV to FP_TMP_REG_MV

1. rename UopDivType
2. change VECTOR_TMP_REG_MV to FP_TMP_REG_MV
3. add UopDivType.VEC_MMM for decode of VMAND_MM VMANDN_MM ... VMXOR_MM

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fix(VIPU): fix decode bug of VIAluDecoder

decode: support mask instrutions UOP_DIV (#1975)

decode: fix narrowing instrutions bugs(uop-div) (#1972)

func(vstart): add vstart from CSR to VIPU

decode: support widening/narrowing/vsext/vzext instructions uop-div (#1963)

func(decode):add VIAlu decode of VecDecoder & VIPU

1. fix bug that connection of fuOpType in VIPU
2. vadd vmin vminu vmax vmaxu vand vor vxor vsub vrsub test pass

Rob: Add Rab module to support separate commit of uops and instructions (#1956)

func(vxsat): add vxsat form VIPU to CSR

func(uopIdx): add end flag for uopIdx

1. add end flag for uopIdx
2. fix(VFPU): io.in.ready should be ture.B
3. func(VIAlu):add VIAlu code v2

func(vialu): add vialu & pass vadd (#1953)

support vmv.s.x and vx instruction(vadd.vx, vsub.vx) (#1951)

func(vmask): add vmask to the pipeline & support vmadc.vim

func(VIPU): support vrsub & vmadc (#1946)

* func(vrsub):support vrsub.vv

TODO:
1. depends on yunsuan'commit of func(vrsub)
2. require difftest

* func(adc): support vmadc.vv vmadc.vi vmadc.vx

func(VIPU): support vrsub & vmadc (#1946)

* func(vrsub):support vrsub.vv

TODO:
1. depends on yunsuan'commit of func(vrsub)
2. require difftest

* func(adc): support vmadc.vv vmadc.vi vmadc.vx

TODO:
1. NEMU need to update

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func(vfdiv): support vfdiv.vv vfdiv.vf (#1944)